Read Sharp XG-NV1E (serv.man18) Service Manual online
XG-NV1U
4
1-3-2. Block Diagram (HD641180X)
Ø
Timing
Generator
Bus State Control
Address Bus (16 bit)
Data
Bus
(8 bit)
CPU
Interrupt
DMAC
(2ch)
RAM
(512B)
16 bit
Reload
Timer
(2ch)
Reload
Timer
(2ch)
16 bit
Programable
Timer
DATA
Buffer
8
20
Address
Buffer
Buffer
MMU
Analog
Comparator
(6ch)
ASCI
(channel 0)
ASCI
(channel 1)
Clocked
Serial
I/O Port
Serial
I/O Port
P
O
r
t
G
O
r
t
G
P
O
r
t
A
O
r
t
A
TOUT2
TOUT3
IC
D
0
-D
7
A
0
-A
19
PG
5
-AN
5
PG
4
-AN
4
PG
3
-AN
3
PG
2
-AN
2
PG
1
-AN
1
PG
0
-AN
0
PA
6
/DREQ
1
PA
7
/TEND
1
CKA
0
/DREQ
0
PA
0
/TXA
1
PA
2
/CKA
1
/TEND
0
TOUT1
TXA
0
RXA
0
RTS
0
CTS
0
DCD
0
PA
4
/RXS
/CTS
1
PA
1
/RXA
1
PA
5
/CKS
PA
3
/TXS
XTAL
EXTAL
MP
0
MP
1
ST
BUSREQ
BUSACK
WAIT
RESET
HALT
REF
IOE
ME
E
LIR
WR
RD
NMI
INT
0
INT
1
INT
2
Figure 1-2.
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