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MX7000N CIRCUIT DIAGRAM / 回路図 2 – 93
TP426
IC16
TC7SBD
A
1
B
2
GND
3
TP433
TP383
R83
10kJ
TP395
R77
33J
TP427
R228
10kJ
R78 20kJ
TP377
TP973
R76
33J
TP391
C75
0.1uF
IC14
SN74LVC2G
A1
1
A2
3
Y1
Y2
VCC
GND
R75 10kJ
IC22
FST3126
OE1
1
1A
2
OE2
4
2A
5
GND
7
3A
9 OE3
10
4A
12 OE4
13
V
C249
0.1uF
R72
33J
TP430
TP944
TP407
TP388
TP378
IC17
SN74LVC2G
A1
1
A2
3
Y1
Y2
VCC
GND
TP946
TP385
BR56
10kJ x4
1
8
2
7
3
6
4
5
R229
10kJ
TP386
C92
100pF
R735
1kJ
IC13
SN74LVC244APWR
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1 18
1Y2 16
1Y3 14
1Y4 12
2Y1 9
2Y2 7
2Y3 5
2Y4 3
VCC 20
GND
10
R736
1kJ
TP972
TP930
TP381
CRM_K#
CRM_C#
CRM_M#
CRM_Y#
CRM_DIR
CRM_K
CRM_C
CRM_M
CRM_Y
RESET#
3.3V
5VNPD
3.3V
5VN
5VN
3.3V
3.3V
CRM_K_DT#
(19)
CRM_DIR
(4)
CRM_C_DT#
(19)
CRM_M_DT#
(19)
CRM_Y_DT#
(19)
(PPD2)
(11)
(PPD2#)
(1)
5V_mon
(4)
SIN3#
(11)
(SIN3)
(1)
MPFS
(3)
MPFS#
(9)
/ENG_RST#
(1)
/RESET0
(1,2)
CRM_K2_DT#
(19)
CRM_K2_DT
(4)
(SIN1)
(1)
(SIN2)
(1)
SIN1#
(6)
SIN2#
(6)
/POFin
(6)
T2PUS
(3)
T1PUS
(3)
T2PUS#
(8)
T1PUS#
(8)
A
A
B
B
C
C
4
3
2
1
PCU PWB (Logic Buffer section 1)
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