Read Sharp AR-C200P (serv.man4) Service Manual online
AR-C200P Rev.5
14/
(1)
CPU
The CPU is PowerPC750CXe, a 64-bit bus RISC processor, which inputs an 100-MHz CLK
(= BUS CLK), and operates at 450MHz that is 4.5 times the input.
The CPU is PowerPC750CXe, a 64-bit bus RISC processor, which inputs an 100-MHz CLK
(= BUS CLK), and operates at 450MHz that is 4.5 times the input.
(2)
Cache
PPC750Cxe has its cache only inside of it.
Speed:
PPC750Cxe has its cache only inside of it.
Speed:
Same as CPU Core CLK speed
Capacity:
Primary Cache:
Primary Cache:
32 K bytes in D-cache capacity, 32 K bytes in I-cache capacity
Secondary Cache: 256 K bytes
(3)
ROM
ROM is to be inserted into the two 168 pin DIMM slots. The slot A is for program ROM and
the slot B is for Japanese kanji fonts. The slot C is not assigned.
ROM is to be inserted into the two 168 pin DIMM slots. The slot A is for program ROM and
the slot B is for Japanese kanji fonts. The slot C is not assigned.
(4)
RAM
RAM is to be inserted into the three 168 pin DIMM slots. The DIMMs must be fitted in
descending labeled type No. order into the slots 1, 3, 2 and 4.
RAM is to be inserted into the three 168 pin DIMM slots. The DIMMs must be fitted in
descending labeled type No. order into the slots 1, 3, 2 and 4.
SDRAM DIMM Specifications:
Speed: PC133 or more
Capacity: 64/128/256/512 MB
Configuration: Without parity. Without ECC. SPD information is required.
Capacity: 64/128/256/512 MB
Configuration: Without parity. Without ECC. SPD information is required.
(5)
EEPROM
EEPROM, an 8-pin DIP package, is to be inserted into the IC socket. The EEPROM is of 16
Kbits for 3.3V power supply, and settings for controlling the controller block are stored in it.
EEPROM, an 8-pin DIP package, is to be inserted into the IC socket. The EEPROM is of 16
Kbits for 3.3V power supply, and settings for controlling the controller block are stored in it.
(6)
Flash ROM
A 4Mbyte flash ROM is surface-mounted on the TIG board. The flash ROM is composed of
four 2048k-by-16bit chips, and fonts and macros can be stored in it.
A 4Mbyte flash ROM is surface-mounted on the TIG board. The flash ROM is composed of
four 2048k-by-16bit chips, and fonts and macros can be stored in it.
(7)
Memory Control LSI (CAI)
A 696-pin BGA package ASIC made by NEC. The chip mainly controls a CPU I/F, memory,
video data compression and decompression, and a PU-video I/F.
A 696-pin BGA package ASIC made by NEC. The chip mainly controls a CPU I/F, memory,
video data compression and decompression, and a PU-video I/F.
(8)
Interface Control LSI (C2)
A BGA package ASIC made by Toshiba, which controls a PU command I/F, operator panel
I/F, IDE I/F, Centronics I/F, USB I/F, PCI I/F, EEPROM and a SPD (SDRAM DIMM) I/F.
A BGA package ASIC made by Toshiba, which controls a PU command I/F, operator panel
I/F, IDE I/F, Centronics I/F, USB I/F, PCI I/F, EEPROM and a SPD (SDRAM DIMM) I/F.
(9)
IDE HDD
An IDE connector is surface-mounted on the board to which an IDE HDD assembled using
exclusive molds will be connected. The IDE HDD is used for storing font data, spooling edited
video data and registering form data.
An IDE connector is surface-mounted on the board to which an IDE HDD assembled using
exclusive molds will be connected. The IDE HDD is used for storing font data, spooling edited
video data and registering form data.
(10) PCI Bus Option
Two PCI I/F slots are provided for option board use. The bus, which uses an Oki Data original
connector, can accept an Ethernet board.
connector, can accept an Ethernet board.
(11) Host Interface
Standard:
Centronics two-way parallel I/F (IEEE-1284-compliant)
USB (USB1.1-compliant)
USB (USB1.1-compliant)
Additional Board: (connected to PCI BUS)
Ethernet Board
Click on the first or last page to see other AR-C200P (serv.man4) service manuals if exist.