Read Sharp AR-C200P (serv.man4) Service Manual online
AR-C200P Rev.5
1
3
/
2.1
Main Board (TIG PWB)
Figure 2-2 provides the block diagram of the main control board (TIG PWB).
Figure 2-2
3
PU-CU
200
pin
C2516
EEPROM
V
ideo Data K,
Y
, M, C
V
ideo I/F From PU
PU-CU I/F
T
o C2 LSI
to PU PU-CU Command I/F
to PU Panel I/F
A
[31:0]
SUB Bus
A/D [31:0], Cont
[15:0]
SPD
[2]
[1]
[0]
SUB Bus
a Line
Address. Cont
b Line
Address. Cont
D [63:0]
[15:0]
[7:0]
D [63:0]
D [63:0]
D [63:0]
D
[15:0]
Cont
Panel I/F From C2 LSI
3.3V
Reset IC
2.5V
1.8V
12V
3.3V
5V
2.5V
14.31818MHz
Crystal
Resonator
M62733ML
(PU3V)
PST596
(PU12V)
PST596
(+5V)
internal
CPU CLK
setting Resister
PLL702-01
3.3V
Regulator
PPC
750cx
Core:1.8V
I/O:2.5V
2.5V
Regulator
CA1 LSI
MHM
2030-003
(uPD856
11N7)
Core:2.5V
I/O:3.3V
CPU I/O:2.5V
C2 LSI
MHM2031-002
DRCLK
3.3V
100MHz
RAMCLK
From 702
LV
C
161284
PLL102-5
33MHz
×
5
33MHz 3.3V
×
4
33MHz 3.3V
USB
C
e
n
t
r
o
L60851
PCI
Slot
FPGA
for IDE
CENT
PCI
Reset
IDE
HDD
I/O 2.5V
74L
VC04
to each LSI
MPUCLK
2.5V
100MHz
CA1CLK
2.5V
100MHz
48MHz
to USB
33MHz
33MHz
33MHz
Local
33MHz
48MHz
A,Cont
1.8V
Regulator
+
Flash
Mask 32bit
×
2
ROM DIMM
×
2
SDRAM DIMM
×
3
SDRAMCLK
×
12
3.3V 100MHz
1
2
PCI BUS [31:0]
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