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R-8000GK
18
Pin No.
Signal
I/O
Description
34
P66
IN
Terminal to input the program to LSI.
35
P65
OUT
Memory (EEPROM) clock out.
36
P64
IN/OUT
Terminal to input the program to LSI.
37-88
FLD51-FLD0
OUT
Segment data signals.
The relation between signals and indicator are as follows:
The relation between signals and indicator are as follows:
Signal (
Pin No.
) Segment (
Pin No.
) Signal (
Pin No.
) Segment (
Pin No.
) Signal(
Pin No.
) Segment(
Pin No.
)
FLD 0 (88) ------------ 10G(45)
FLD 18 (70) ------------- P9 (67)
FLD 36 (52) -------------- P30 (19)
FLD 1 (87) ------------- 9G (46)
FLD 19 (69) ----------- P10 (68)
FLD 37 (51) -------------- P29 (20)
FLD 2 (86) ------------- 8G (47)
FLD 20 (68) ----------- P11 (69)
FLD 38 (50) -------------- P28 (21)
FLD 3 (85) ------------- 7G (48)
FLD 21 (67) ----------- P12 (70)
FLD 39 (49) -------------- P27 (22)
FLD 4 (84) ------------- 6G (49)
FLD 22 (66) ----------- P13 (71)
FLD 40 (48) -------------- P26 (23)
FLD 5 (83) ------------- 5G (50)
FLD 23 (65) ----------- P14 (72)
FLD 41 (47) -------------- P25 (24)
FLD 6 (82) ------------- 4G (51)
FLD 24 (64) ------------- P42 (7)
FLD 42 (46) -------------- P24 (25)
FLD 7 (81) ------------- 3G (52)
FLD 25 (63) ------------- P41 (8)
FLD 43 (45) -------------- P23 (26)
FLD 8 (80) ------------- 2G (53)
FLD 26 (62) ------------- P40 (9)
FLD 44 (44) -------------- P22 (27)
FLD 9 (79) ------------- 1G (54)
FLD 27 (61) ----------- P39 (10)
FLD 45 (43) -------------- P21 (28)
FLD10 (78) ------------ P1 (59)
FLD 28 (60) ----------- P38 (11)
FLD 46 (42) -------------- P20 (29)
FLD11 (77) ------------ P2 (60)
FLD 29 (59) ----------- P37 (12)
FLD 47 (41) -------------- P19 (30)
FLD12 (76) ------------ P3 (61)
FLD 30 (58) ----------- P36 (13)
FLD 48 (40) -------------- P18 (31)
FLD13 (75) ------------ P4 (62)
FLD 31 (57) ----------- P35 (14)
FLD 49 (39) -------------- P17 (32)
FLD14 (74) ------------ P5 (63)
FLD 32 (56) ----------- P34 (15)
FLD 50 (38) -------------- P16 (33)
FLD15 (73) ------------ P6 (64)
FLD 33 (55) ----------- P33 (16)
FLD 51 (37) -------------- P15 (34)
FLD16 (72) ------------ P7 (65)
FLD 34 (54) ----------- P32 (17)
FLD17 (71) ------------ P8 (66)
FLD 35 (53) ----------- P31 (18)
89
VEE
IN
Anode (segment) of Fluorescent Display light-up voltage: -30V.
VEE voltage of power source circuit input.
VEE voltage of power source circuit input.
90-92
PB6-P84
OUT
Terminal not used.
93
PB3
IN
Signal coming from tact switches (SW10, SW23).
94
PB2
IN
Signal coming from tact switches (SW7-9, SW19-22).
95
PB1
IN
Signal coming from tact switches (SW4-6, SW15-18).
96
PB0
IN
Signal coming from tact switches (SW1-3, SW11-14).
97
AVSS
IN
A/D converter power source voltage.
The power source voltage to drive the A/D converter in the LSI.
The power source voltage to drive the A/D converter in the LSI.
98
VREF
IN
Reference voltage input terminal.
A reference voltage applied to the A/D converter in the LSI. Connected to GND.(0V)
A reference voltage applied to the A/D converter in the LSI. Connected to GND.(0V)
99
AN7
OUT
Tact switch strobe signal.
Signal applied to tact switch section (SW3, SW6, SW9).
Signal applied to tact switch section (SW3, SW6, SW9).
100
AN6
OUT
Tact switch strobe signal.
Signal applied to tact switch section (SW2, SW5, SW8).
Signal applied to tact switch section (SW2, SW5, SW8).
Memory Processor (IC-2)
Memory processor is a 16K-bit, serial memory, enabling CMOS to be erased/written electrically. This memory is constructed with 2048
registers x 8bits, enabling individual access, read and write operations to be performed. Details of input/output signal for IC2 are as
shown in the following diagram.
registers x 8bits, enabling individual access, read and write operations to be performed. Details of input/output signal for IC2 are as
shown in the following diagram.
Figure T-3 Relation between Pin Nos, and Signals
Pin No.
Signal
I/O
Description
1-3
A0-A2
IN
Connected to -5V.
4
VSS
IN
Connected to -5V.
5
SDA
IN/OUT
Serial data input/output : input/outputs data to IC1.
6
SCL
IN
Clock signal input : input/outputs sireal data at every one pulse.
7
WP
IN
Connected to -5V.
8
VCC
IN
Connected to GND.
A0
A1
A2
VSS
VCC
WP
SCL
SDA
TOP VIEW
1
2
3
4
8
7
6
5
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