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SD-SH111
– 48 –
+11V_RELAY
RR_M
RL_M
FR_M
FL_M
C_M
W_M
W_SP_RLY
OFFSET
RIMIT
C_SP_RLY
S_SP_RLY
F_SP_RLY
FAN_L/H
OFFSET
OFFSET
OFFSET
C_P
FL_P
RL_P
RR_P
W_P
FR_P
OFFSET
TO MAIN PWB
A-12V
A+12V
FAN_L/H
PROTECT
RIMIT
W_SP_RLY
C_SP_RLY
S_SP_RLY
F_SP_RLY
–B_CONT
CENTER–
CENTER+
WOOFER+
WOOFER–
REAR_RCH+
REAR_RCH–
REAR_RCH–
REAR_LCH–
REAR_LCH+
REAR_LCH+
FRONT_LCH+
FRONT_LCH–
FRONT_RCH–
FRONT_RCH+
–13V
+13V
FROM
POWER A PWB
2
3
4
5
4
3
1
2
4
2
1
3
1
15
10
11
12
13
14
15
1
9
8
5
4
7
2
3
1
6
2
1
3
1
2
CNP503
CNS902
FROM
DISPLAY PWB
CNSE07
FROM
1-BIT AMP.PWB
CNSA110F
FROM
1-BIT AMP.PWB
CNSA110B
FROM
1-BIT AMP.PWB
CNSA110D
CNW503
CNP705
CNP706
CNP707
CNS503
CNP704
CNP714
Q730
Q732
Q729
Q731
Q728
Q726
Q725
Q727
Q724
Q722
Q723
Q705
Q704
RL704
Q703
Q702
Q710
Q711
Q708
Q709
Q717
Q
Q706
Q701
Q721
RL702
RL703
RL705
Q707
RL701
Figure 48 BLOCK DIAGRAM (15/17)
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