Read Sharp SD-AT1000 (serv.man13) Service Manual online
– 33 –
SD-AT1000
Figure 33 SCHEMATIC DIAGRAM (4/11)
7
8
9
10
11
12
+2.5V(D)
+3.3V(D)
+2.5V(A)
47K
47K
S1SS133
180P(CH)
68P
100/10
DZ2.4BSB
1K
1K
1
0.1
IX0446AW
3
1
10/16
0.1
1
SI3033LUS
3
1
10/16
DS1SS133
DS1SS133
0.1
2.2
µ
H
1
1M
8
7
6
5
4
3
2
1
22P(CH)
22P(CH)
0.001
0.01
470P
470
2.2/50
1
0.1
74HC07AF
14 13 12 11 10
9
8
7
6
5
4
3
2
1
10/16
1
0.1
4.7K
4.7K
1
0.1
1
0.1
1
0.1
3.3K
3.3K
3.3K
10K
0.1
100
330
330
100
100
330
33K
10K
10K
3.3K
CS493264
44
43
42
41
40
28 27 26 25 24 23 22 21 20 19 18
6
5
4
3
2
1
3.3K
3.3K
3.3K
10K
10K
10K
10K
10K
10K
10K
10K
2
2
39
38
37
36
35
34
33
32
31
30
29
7
8
9
10
11
12
13
14
15
16
17
DSP_SCCLK
DSP_INTREQ
_DSP_INTREQ
EX_CLK
_DSP_SCDOUT
_DSP_CS
_DSP_SCDIN
DSP_SCDIN
DSP_SCDOUT
DSP_CS
_DSP_SCCLK
DSP_RESET
LRCK
SCLK
MCLK
AUDATA1
AUDATA0
_DSP_SCDIN
/EMWR
/EMOE
/EXTMEM
EMAD0
EMAD1
_DSP_INTREQ
_DSP_SCDOUT
_DSP_CS
_DSP_SCCLK
EMAD5
EMAD3
EMAD6
EMAD4
EMAD7
EMAD2
AUDATA2
LRCK
SDATA1
SCLK
LRCK
SCLK
SDATA1
GND(D)
GND(D)
ASSIS
12.288 MHz
DSP
1A
1Y
2A
2Y
3A
3Y
GND
VCC
SCLKN2
LRCLKN2
SDATAN2
SCCLK
SCDIN
SCDOUT
CS
INTREQ
EXTMEM
SDATAN1
SCLKN1
LRCLKN1
D0
D1
D2
D3
D4
D5
D6
D7
RD
WR
XMT958
MCLK
SCLK
LRCLK
AUDATA0
AUDATA1
AUDATA2
CLKIN
CLKSEL
FILT2
FILT1
RESET
DD
DC
AGND
VA
DGND3
DGND2
DGND1
VD3
VD2
VD1
VCC
GND
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
+B
06
R151
C155
L103
C124
IC103
IC103
TC7WU04U
DUAL2-INPUT
NAND GATE
C123
C156
IC104
R152
C127
IC111
R140
R139
C118
C138
C151
C154
C137
IC112
C152
D104
D105
ZD101
C107
C106
R132
C105
C150
C104
C142
C108
R119
R120
R118
C167
R121
R125
R126
R127
R128
IC101
C103
C141
R117
R114
R116
R115
C163
C101
C139
R103
R102
R104
R101
C102
C140
R105
R108
R109
R110
R111
R112
R113
R107
R106
XL101
R148
C125
C126
R124
R123
VOLTAGE
REGULATOR
3.3V
REGULATOR
BUFFER AMP.
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