Read Panasonic KX-TPA65RU / KX-TPA65RUB Service Manual online
10
KX-TPA65RU/KX-TPA65RUB
4.3.4.
Clock Circuit
Main system clock (13.824MHz) is generated from X1, and Oscillation circuit consists of X1 and IC1.
The clock is buffered out to IC2 by IC6.
IC1 and IC2 have PLL circuits inside and generate clocks for operations.
The clock is buffered out to IC2 by IC6.
IC1 and IC2 have PLL circuits inside and generate clocks for operations.
4.3.5.
Bus Access
The program for IC1, adjustment data,and temporary user data has been stored in IC4.
The program for IC2 has been stored in IC5.
1.8V for IC4 is supplied by IC1 and 1.8V for IC5 is supplied by IC2.
The program for IC2 has been stored in IC5.
1.8V for IC4 is supplied by IC1 and 1.8V for IC5 is supplied by IC2.
X1
13.824MHz
13.824MHz
IC1
Main MPU
Main MPU
IC6
CLK Buffer
CLK Buffer
IC2
Sub MPU
Sub MPU
IC4
QSPl Flash
QSPl Flash
103.68MHz
IC5
QSPI Flash
QSPI Flash
103.68MHz
LCD circuit
8.64MHz
TDM SCLK
2.3MHz
KEY circuit
34.6kHz
SPIM_CLK
3.2MHz
IC4, 5
FLASH
(64Mbit)
DQ[3:0]
*CS
CL
QSPI_CLK
QSPI_IO[3:0]
QSPI_/CS
IC1, 2
DCX81
DQ[3:0]
QCSN0
QSCLK
(QSPI Data)
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