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7
• FIFO/S-RAM Control
Picture Edit Coding Gate Array uses FIFO for Smoothing & Laser pulse width control, and S-RAM
for Smoothing Data and interface controls.
• S-DRAM Control
It generates S-DRAM Control Signal for SORT Memory and Refresh Control when the power is ON.
It does not backup the Page Memory.
2. Optional Memory for Image Side
The Optional Memories are:
• Memory PC Board (SODIMM)
→
DRAM Card (16 MB) for Sort memory
Install the DRAM Card for Sort memory to CN11 (FX/FP Model)/CN27 (A/PA Model) on the SORT
PCB.
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