KX-NS500, KX-NS520, KX-NS500RU, KX-NS520RU - Panasonic PBX Service Manual Supplement (repair manual). Page 5

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5
Changed from Original Service Manual as section 4.2.1.
1.1.1.
CPU Board (MPR)
Fig.2 shows detail block diagram of CPU Board (MPR) , and each function of CPU Board (MPR) is described in Table.4.
Table.4 CPU Board (MPR) Function Description
Device/Function Block
Description
CPU
CPU controls exchange and monitoring functions of the whole NS500 system.
DDR3
DDR3 is main memory of CPU Board (MPR). Operating system, application program and concerning data are
stored in this memory.
NAND Flash
Program and system data are stored in this memory.
SRAM
SRAM is backed up by battery, and system information is stored this non-volatilized memory.
ASIC
ASIC provides basic PBX function such as time switch, tone generation and so on.
USB
USB master port for maintenance.
L2SW/LAN(RJ45)
LAN port is used for VoIP and Web-MC connection.
SD Card
UM voice data are stored in this SD card.
RTC
RTC is battery backed up clock which maintains system clock of NS500 system.
ARM
Cortex- A8
600MHz
L1 32K/32K
w/SED
L2 256K w/ECC
176K ROM
64K RAM
64K RAM
Crypto
DDR
Interface
DDR3
512MB
NAND
NAND
FLASH
512MB
UART
McASP
Ethernet
USB
SD
GPIO
Interrupt
etc.
DC/DC(+3.3V,+1.8V,+1.1V)
I2C
AC_ALM, DC_ALM, System Reset, FPGA_REBOOT, DONE
EXP- M
Connector
DSP
o
pti
o
n
Con
nec
tor
RMT
Opt
io
n
Con
nec
tor
ASIC1
Master
Mode
USB
TypeA
LAN
RJ45
RMII
USB- Host- I/F
SRAM
512KB
LED
RTC
+5V
External bus
ER,DR
SL
IDE SW
SD- I/F
8
0
P
IN
C
O
N
NE
C
T
O
R
(C
PU
In
te
rf
a
c
e
)
TDM
L2SW
PHY
ST
A
T
US
PBX
 MO
D
E
PHY
PHY
DC/DC
+3.3V
+15V
8bit
8bit
16bit
SD- Card
Connector
16bit
+5V
+VBAT
Exp
ansi
on
 bu
s
UART- I/F
+5V
Fig.2 CPU Board (MPR) Block Diagram
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