Read Panasonic KX-NS500 / KX-NS520 / KX-NS500RU / KX-NS520RU (serv.man2) Service Manual Supplement online
27
2.3.5.
No.5
C
E
B
A
D
F
3
6
4
2
5
8
7
GP_BUF_A[7]
GP_BUF_A[1]
GP_BUF_A[5]
GP_A[1]
GP_BUF_D[0-7]
GP_D[2]
GP_D[1]
GP_D[0]
GP_BUF_D[4]
GP_A[0]
GP_BUF_D[0]
GP_A[5]
GP_BUF_D[6]
GP_BUF_A[3]
GP_BUF_A[21]
GP_A[2]
GP_A[22]
GP_A[21]
GP_A[11]
GP_BUF_A[0]
GP_BUF_A[8]
GP_A[4]
GP_BUF_A[2]
GP_BUF_A[22]
GP_D[3]
GP_BUF_D[7]
GP_A[3]
GP_A[9]
GP_BUF_D[2]
GP_BUF_A[6]
GP_BUF_D[1]
GP_A[8]
GP_BUF_A[9]
GP_BUF_D[3]
GP_A[6]
GP_D[4]
GP_BUF_A[20]
GP_BUF_A[4]
GP_BUF_D[5]
GP_A[7]
GP_D[0-7]
GP_D[7]
GP_A[0-23]
GP_BUF_A[10]
GP_BUF_A[11]
GP_D[6]
GP_A[10]
GP_A[20]
GP_D[5]
GP_BUF_A[7]
GP_BUF_A[9]
GP_BUF_A[11]
GP_BUF_A[21]
GP_BUF_D[3]
GP_BUF_D[1]
GP_BUF_D[7]
GP_BUF_D[5]
GP_BUF_A[0-13,20-23]
KX-NS500 CPU BOARD No.5
GP_BUF_D[0]
GP_BUF_D[2]
GP_BUF_D[4]
GP_BUF_D[6]
LUHW[0-4]
LDHW[0-4]
LDHW[0-4]
nHW_FH[0-6]
HW_CLK[0-6]
LDHW[0]
LDHW[1]
LDHW[2]
LDHW[3]
LDHW[4]
nHW_FH[1]
nHW_FH[5]
HW_CLK[2]
HW_CLK[4]
HW_CLK[6]
nHW_FH[0]
nHW_FH[2]
nHW_FH[4]
HW_CLK[1]
HW_CLK[3]
HW_CLK[5]
GP_BUF_A[0]
GP_BUF_A[1]
GP_BUF_A[7]
GP_BUF_A[8]
GP_BUF_A[9]
GP_BUF_A[10]
GP_BUF_A[11]
GP_BUF_A[12]
GP_BUF_A[13]
GP_BUF_A[2]
GP_BUF_A[3]
GP_BUF_A[4]
GP_BUF_A[5]
GP_A[13]
GP_A[12]
GP_BUF_A[12]
GP_BUF_A[13]
GP_BUF_A[21]
GP_BUF_A[22]
GP_BUF_A[23]
BUS_DIR
GP_A[23]
GP_BUF_A[23]
nHW_FH[3]
HW_CLK[0]
nHW_FH[6]
GP_BUF_A[0]
GP_BUF_A[2]
GP_BUF_A[4]
GP_BUF_A[6]
GP_BUF_A[20]
GP_BUF_A[8]
GP_BUF_A[22]
GP_BUF_A[10]
GP_BUF_A[5]
GP_BUF_A[3]
GP_BUF_A[1]
GP_A[15]
GP_A[14]
GP_A[13]
GP_A[12]
GP_A[7]
GP_A[6]
GP_A[4]
GP_A[3]
GP_A[5]
LUHW[0]
LUHW[1]
LUHW[2]
LUHW[3]
LUHW[4]
GP_A[1]
GP_A[2]
GP_A[0]
GP_BUF_A[6]
HW_CLK[0]
HW_CLK[1]
HW_CLK[2]
HW_CLK[3]
HW_CLK[4]
HW_CLK[5]
HW_CLK[6]
nHW_FH[0]
nHW_FH[1]
nHW_FH[2]
nHW_FH[3]
nHW_FH[4]
nHW_FH[5]
nHW_FH[6]
LDHW[0]
LDHW[1]
LDHW[2]
LDHW[3]
LDHW[4]
LUHW[0]
LUHW[1]
LUHW[2]
LUHW[3]
LUHW[4]
+3.3VD
IC504
TC74LCX245FT(EKJ)
1
DIR
2
A1
18
B1
19
*OE
3
A2
20
VCC
4
A3
17
B2
5
A4
16
B3
6
A5
15
B4
7
A6
14
B5
8
A7
13
B6
9
A8
12
B7
10
GND
11
B8
+3.3VD
IC501
TC74LCX245FT(EKJ)
1
DIR
2
A1
18
B1
19
*OE
3
A2
20
VCC
4
A3
17
B2
5
A4
16
B3
6
A5
15
B4
7
A6
14
B5
8
A7
13
B6
9
A8
12
B7
10
GND
11
B8
R509
10
1
2
3
45
6
7
8
C502
0.1u
16
R513
10
1
2
3
45
6
7
8
nWE
002:8E
R514
10
1
2
3
45
6
7
8
DG
DG
R511
10
1
2
3
45
6
7
8
IC503
TC74LCX245FT(EKJ)
1
DIR
2
A1
18
B1
19
*OE
3
A2
20
VCC
4
A3
17
B2
5
A4
16
B3
6
A5
15
B4
7
A6
14
B5
8
A7
13
B6
9
A8
12
B7
10
GND
11
B8
DG
R512
10
1
2
3
45
6
7
8
R510
10
1
2
3
45
6
7
8
IC502
TC74LCX245FT(EKJ)
1
DIR
2
A1
18
B1
19
*OE
3
A2
20
VCC
4
A3
17
B2
5
A4
16
B3
6
A5
15
B4
7
A6
14
B5
8
A7
13
B6
9
A8
12
B7
10
GND
11
B8
+3.3VD
C504
0.1u
16
R508
10
1
2
3
45
6
7
8
DG
R515
10
1
2
3
45
6
7
8
DG
DG
C503
0.1u
16
nRD
002:8E
GP_D[0-7]
002:8F
DG
C501
0.1u
16
DG
+3.3VD
FPGA_DONE
003:2D
R502
10k
+3.3VD
C505
0.1u
50
R531
10
1
2
3
45
6
7
8
DG
R530
10
1
2
3
45
6
7
8
+15V
DG
R536
10
R528
10
1
2
3
45
6
7
8
R527
10
1
2
3
45
6
7
8
R529
10
1
2
3
45
6
7
8
R523
10
1
2
3
45
6
7
8
R537
10
1
2
3
45
6
7
8
R535
10
R522
10
R534
10
R521
10
+3.3V_BASE_BAT
DC_ALM
003:2D
R516
1k
+3.3VD
+3.3VD
R540
1k
R517
10k
R507
10k
nRESET_BASE
004:5D
R553
10k
R552
10k
+3.3VD
CN501
11
CN501
8
4
CN501
36
CN501
29
CN501
26
CN501
18
CN501
31
CN501
13
CN501
4
CN501
1
4
CN501
16
CN501
24
CN501
5
7
CN501
6
4
CN501
27
CN501
23
CN501
28
CN501
0
5
CN501
2
5
CN501
7
6
CN501
8
7
CN501
2
6
CN501
34
CN501
3
7
CN501
9
CN501
6
5
CN501
21
CN501
17
CN501
5
5
CN501
20
CN501
2
7
CN501
5
6
CN501
35
CN501
7
5
CN501
19
CN501
2
4
CN501
3
6
CN501
40
CN501
25
CN501
7
4
CN501
9
5
CN501
14
CN501
53647-0874
1
CN501
0
8
CN501
1
6
CN501
15
CN501
37
CN501
9
6
CN501
4
4
CN501
7
CN501
12
CN501
38
CN501
10
CN501
8
5
CN501
5
CN501
3
4
CN501
0
6
CN501
8
CN501
1
7
CN501
4
5
CN501
6
6
CN501
5
4
CN501
4
7
CN501
9
7
CN501
9
4
CN501
4
6
CN501
22
CN501
3
CN501
39
CN501
32
CN501
33
CN501
7
7
CN501
1
5
CN501
2
CN501
6
CN501
8
6
CN501
0
7
CN501
30
CN501
3
5
CN501
6
7
AC_ALM
003:4D
R554
10
1
2
3
45
6
7
8
GP_A[0-23]
DG
R546
10k
R547
10k
R543
100k
1
2
3
45
6
7
8
+3.3VD
R548
NC
R549
10k
R550
10k
R551
10k
DG
R518
10k
R542
10k
4
3
2
18
7
6
5
R519
10k
1
2
3
4
5
6
7
8
+3.3VD
+15V
R555
10k
+3.3VD
R556
10k
R557
10k
+3.3VD
L2SW_CLK_25MHz
006:5F
R558
10
R560
100k
R561
NC
R559
100k
R562
10k
L526
1
2
3
45
6
7
8
L524
1
2
3
45
6
7
8
L525
1
2
3
45
6
7
8
L533
1
2
3
45
6
7
8
L532
1
2
3
45
6
7
8
L538
1
2
3
45
6
7
8
L539
BLM15BA220SN1D
C506
0.01u
50
NC
IC201
A45
NWAIT_BASE_I
A37
PT_TXB_O1
B37
PT_TXB_O0
A49
PT_RXB_O1
B45
PT_RXB_O0
A47
CLK25MOUT
B47
PT_RXA_O0
A50
PT_RXA_O1
A48
PT_TXA_O0
B44
PT_TXA_O1
A34
NIRQ_EXT_I0
A36
nOE_ABUS
A39
NIRQ_EXT_I1
A38
nOE_DBUS
A52
NETREF_I0
A51
DBUS_DIR
A58
NCS_BASE_O
A53
HWCLK0
B48
HWCLK1
A40
HWCLK2
B38
HWCLK3
A35
HWCLK4
A54
HWCLK5
B49
HWCLK6
A56
FSYNC0
A55
FSYNC1
B50
FSYNC2
B52
FSYNC3
A57
FSYNC4
B54
FSYNC5
B53
FSYNC6
A61
UHW_BASE0
A60
UHW_BASE1
A59
UHW_BASE2
B56
UHW_BASE3
B34
UHW_BASE4
IC201
B57
DHW_BASE0
A62
DHW_BASE1
B58
DHW_BASE2
A63
DHW_BASE3
A69
DHW_BASE4
A67
LAC_I2
A64
LAC_I1
B59
LAC_I0
A70
LAB_I05
A66
LAB_I04
B62
LAB_I03
A71
LAB_I02
B64
LAB_I13
B63
LAB_I12
A68
LAB_I11
B66
LAB_I10
B69
LAB_I09
A65
LAB_I08
B61
LAB_I07
B65
LAB_I06
A72
LAB_I01
B68
LAB_I00
R833
220
R563
220
R564
220
R565
220
R566
220
R567
220
R568
220
R569
220
R834
220
R835
220
R836
220
R837
220
R838
220
R839
220
R840
220
R841
220
R843
220
R844
220
R845
220
R842
220
R846
220
R847
220
R848
220
R849
220
R890
220
BASE BOARD CONNECTOR
(Do not drive)
DATA[2]
nRD
A[21]
nWR
A[4]
DG
A[2]
DATA[4]
DATA[6]
DATA[7]
DATA[0]
DG
DATA[1]
A[7]
+15V
DG
DG
+15V
NETREF
DATA[5]
DG
DATA[3]
DG
nAC_ALM
A[6]
A[1]
nCS
N.C.
DG
The PIN name is a name seen from CPU side.
nRESRT
+3.3VB
N.C.
nWITE
DG
A[22]
A[20]
A[11]
A[10]
A[9]
A[8]
A[5]
A[3]
A[0]
nINT0
nINT1
nDC_ALM
HW_CLK6
HW_CLK5
HW_CLK2
HW_CLK0
HW_CLK4
HW_CLK3
HW_CLK1
nHW_FH6
nHW_FH4
nHW_FH2
nHW_FH0
nHW_FH5
nHW_FH3
nHW_FH1
LUHW4
LUHW3
LUHW2
LUHW1
LUHW0
LDHW3
LDHW2
LDHW4
LDHW0
LDHW1
PT_TXB1
PT_TXB0
PT_RXB1
PT_RXB0
PT_TXA1
PT_TXA0
PT_RXA1
PT_RXA0
DG
DG
confidential
nCS_BASE
nCS_BASE
BUS_DIR
DBUS_nOE
ABUS_nOE
nINT_BASE1
nINT_BASE0
ASIC
ASIC
BASE_BUFFER
/(FPGA_ADDRESS_BUFFER)
ADDRESS
SYS_BOOT
nWAIT_BASE
002:8E,003:2D
NAND-->SD : 10011
SD : 10111
UART->SD->NAND : 00100
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