Read Panasonic KX-NS500 / KX-NS520 / KX-NS500RU / KX-NS520RU (serv.man2) Service Manual Supplement online
24
2.3.2.
No.2
NAND GP_D[7]
NAND RDY
NAND ALE
NAND *WE
NAND *RE
NAND *CS
SRAM D[8]
SRAM *WE
SRAM *OE
SRAM GP_A[1]
SRAM *CS
+
-
+
-
C
E
B
A
D
F
3
6
4
2
5
8
7
GP_D[7]
GP_D[6]
GP_D[5]
GP_A[0-21]
GP_D[4]
GP_D[3]
GP_D[2]
GP_D[1]
GP_D[0]
GP_D[0]
GP_D[1]
GP_D[2]
GP_D[3]
GP_D[7]
GP_D[4]
GP_D[5]
GP_D[6]
GP_D[15]
GP_D[14]
GP_D[12]
GP_D[13]
GP_D[8]
GP_D[10]
GP_D[9]
GP_D[11]
GP_O_D[1]
GP_O_D[6]
GP_O_D[7]
GP_O_D[2]
GP_O_D[4]
GP_O_D[0]
GP_O_D[3]
GP_O_D[5]
GP_O_D[8]
GP_O_D[9]
GP_O_D[11]
GP_O_D[14]
GP_O_D[13]
GP_O_D[12]
GP_O_D[15]
GP_O_D[10]
GP_O_A[15]
GP_O_A[5]
GP_O_A[2]
GP_O_A[0]
GP_O_A[11]
GP_O_A[8]
GP_O_A[3]
GP_O_A[14]
GP_O_A[10]
GP_O_A[7]
GP_O_A[6]
GP_O_A[4]
GP_O_A[13]
GP_O_A[1]
GP_O_A[12]
GP_O_A[9]
GP_O_A[19]
GP_O_A[18]
GP_O_A[17]
GP_O_A[16]
GP_D[0]
GP_D[1]
GP_D[3]
GP_D[2]
GP_D[5]
GP_D[6]
GP_D[7]
GP_D[4]
GP_D[9]
GP_D[15]
GP_D[10]
GP_D[11]
GP_D[13]
GP_D[14]
GP_D[8]
GP_D[12]
GP_A[0]
GP_A[1]
GP_A[2]
GP_A[3]
GP_A[4]
GP_A[5]
GP_A[6]
GP_A[7]
GP_A[8]
GP_A[9]
GP_A[10]
GP_A[11]
GP_A[12]
GP_A[13]
GP_A[14]
GP_A[15]
GP_A[16]
GP_A[17]
GP_A[18]
GP_A[19]
GP_A[6]
GP_A[5]
GP_A[4]
GP_A[3]
GP_A[2]
GP_A[1]
GP_D[8]
GP_D[9]
GP_D[11]
GP_D[10]
GP_D[13]
GP_D[15]
GP_D[12]
GP_D[14]
GP_A[14]
GP_A[15]
GP_A[17]
GP_A[16]
GP_A[18]
GP_A[5]
GP_A[4]
GP_A[2]
GP_A[1]
GP_A[3]
GP_A[6]
GP_A[7]
GP_A[8]
GP_A[10]
GP_A[9]
GP_A[13]
GP_A[12]
GP_A[11]
GP_D[7]
GP_D[6]
GP_D[4]
GP_D[5]
GP_D[0]
GP_D[2]
GP_D[1]
GP_D[3]
GP_D[0-15]
nCS0_NAND
GP_D[2]
GP_D[3]
GP_D[4]
GP_D[5]
GP_D[6]
GP_D[7]
GP_D[12]
GP_D[8]
GP_D[14]
GP_D[13]
GP_D[11]
GP_D[10]
GP_D[15]
GP_D[9]
GP_D[4]
GP_D[7]
GP_D[6]
GP_D[5]
GP_D[2]
GP_D[3]
GP_D[1]
GP_D[0]
GP_D[0]
GP_A[1]
GP_A[0]
GP_D[4]
GP_D[2]
GP_D[6]
GP_D[7]
GP_D[5]
GP_D[3]
GP_A[2]
GP_D[1]
GP_D[1]
GP_A[20]
GP_A[21]
GP_A[0-21]
nCS3_TRACE
GP_D[0]
nCS2_DSP_SRAM
nCS1_FPGA
GP_D[0-7]
nCS_SRAM
+15V
DG
DG
DG
DG
+3.3VD
DG
+3.3VD
DG
+3.3VD
DG
+3.3VD
DG
+15V
+3.3VD
DG
+3.3VD_B
+3.3V_BASE_BAT
+3.3VD
+3.3VD
DG
DG
+3.3VD
DG
DG
CN202
15
CN202
17
CN202
9
5
CN202
0
7
CN202
8
CN202
4
6
CN202
24
CN202
35
CN202
8
7
CN202
0
5
CN202
7
7
CN202
9
7
CN202
6
4
CN202
5
4
CN202
34
CN202
1
7
CN202
8
5
CN202
3
6
CN202
2
6
CN202
19
CN202
0
8
CN202
2
CN202
3
4
CN202
6
7
CN202
9
6
CN202
4
5
CN202
6
CN202
39
CN202
31
CN202
29
CN202
26
CN202
16
CN202
18
CN202
36
CN202
6
5
CN202
9
4
CN202
7
4
CN202
8
6
CN202
14
CN202
K1FB280D0001
52901-0874
1
CN202
12
CN202
7
CN202
3
7
CN202
22
CN202
20
CN202
4
7
CN202
32
CN202
28
CN202
4
CN202
5
7
CN202
2
7
CN202
3
5
CN202
11
CN202
30
CN202
1
4
CN202
7
6
CN202
37
CN202
9
CN202
13
CN202
3
CN202
6
6
CN202
10
CN202
25
CN202
4
4
CN202
33
CN202
1
6
CN202
2
5
CN202
2
4
CN202
23
CN202
21
CN202
38
CN202
8
4
CN202
7
5
CN202
5
CN202
5
6
CN202
40
CN202
5
5
CN202
27
CN202
0
6
CN202
1
5
CPU_TDI
003:1E
TDM0_DR_DSP
004:2D
DEBUG_SERIAL_TXD
003:4D
CPU_TMS
003:1E
LAN_RX_XP_DSP
003:8A
CPU_TDO
003:1E
DEBUG_SERIAL_RXD
003:4D
BAT_ALM_n
003:2D
FPGA_nCONFIG
003:4D
TDM0_CK_DSP
004:2D
FPGA_nSTATUS
003:4D
nWE
005:4E
TDM0_FS_DSP
004:2D
TDM0_DX_DSP
004:2D
CPU_nSRST
003:2C
LAN_TX_XP_DSP
003:8A
nRD
005:4F
LAN_TX_XM_DSP
003:8A
GP_A[0-21]
005:3C
CPU_TCK
003:1E
LAN_RX_XM_DSP
003:8A
R207
10k
1
2
3
45
6
7
8
C214
0.01u
16
NC
R257
10
1
2
3
45
6
7
8
R261
0
R208
10k
1
2
3
45
6
7
8
R210
10k
1
2
3
45
6
7
8
C212
0.1u
50
R263
0
C202
0.1u
16
R223
10
1
2
3
45
6
7
8
R209
10k
1
2
3
45
6
7
8
R213
10
R220
10
R222
10
2
3
1
45
8
6
7
R247
1k
C205
0.1u
16
R246
1k
R250
10
C208
0.1u
16
C213
100p
D203
R214
10
R254
10
1
2
3
45
6
7
8
R236
2.2k
R248
10
R234
10k
R226
10
1
2
3
45
6
7
8
R238
10k
R217
10
R265
10
R242
4.7k
R211
10
R202
10k
R259
0
R249
10
R252
10
1
2
3
45
6
7
8
R201
10k
R206
10
1
2
3
45
6
7
8
R251
10
1
2
3
45
6
7
8
R255
10
1
2
3
45
6
7
8
R218
10
C201
0.1u
50
C203
0.1u
16
R215
10
R228
10
R204
10
1
2
3
45
6
7
8
D201
1SS424(TPH3,F)
R203
10
1
2
3
45
6
7
8
R224
10
4
2
3
18
6
7
5
R227
10
R264
10
TP_BAT_ALM
C210
0.1u
16
R262
0
R219
10
R225
10
8
7
6
54
3
2
1
R256
10
1
2
3
45
6
7
8
TP_+3.3VD_B
D202
TP_3.3V_BAT
R212
10
R216
10
R241
10M
R253
10
1
2
3
45
6
7
8
R205
10
1
2
3
45
6
7
8
R260
0
C206
0.1u
16
R233
10k
+3.3VD
R235
10k
R240
1k
R237
10k
+3.3VD
R239
10k
DG
DG
R229
10k
+3.3VA_FROM_DSP
R231
10k
+3.3VD
PMIC_nPOR
003:2E;006:6E
DG
CPU_nTRST
003:2C
IC202
3
2
1
IC202
NJM2903M(TE1)
5
6
7
IC202
NJM2903M(TE1)
4
GND
8
VCC
nRESET_DSP_PHY
004:5D
nRESET_DSP
004:5D
R221
0
BUS_CLK_50MHz
003:2D
R232
10M
TDM1_DX_DSP
004:2D
TDM1_DR_DSP
004:2D
GP_D[0-7]
005:3B
CN201
10
CN201
6
CN201
2
CN201
40
CN201
31
CN201
39
CN201
25
CN201
26
CN201
5
CN201
4
CN201
13
CN201
33
CN201
27
CN201
17
CN201
9
CN201
28
CN201
7
CN201
21
CN201
19
CN201
3
CN201
20
CN201
38
CN201
11
CN201
52901-0474
@NC
1
CN201
30
CN201
12
CN201
15
CN201
32
CN201
24
CN201
34
CN201
16
CN201
37
CN201
14
CN201
22
CN201
8
CN201
23
CN201
35
CN201
18
CN201
36
CN201
29
IC206
EM643FV16FU-55LF
1
A4
2
A3
42
A7
43
A6
3
A2
44
A5
4
A1
41
*OE
5
A0
40
*UB
6
*CS
39
*LB
7
DQ0
38
DQ15
8
DQ1
37
DQ14
9
DQ2
36
DQ13
10
DQ3
35
DQ12
11
VCC1
34
VSS2
12
VSS1
33
VCC2
13
DQ4
32
DQ11
14
DQ5
31
DQ10
15
DQ6
30
DQ9
16
DQ7
29
DQ8
17
*WE
28
NC
18
A17
27
A8
19
A16
26
A9
20
A15
25
A10
21
A14
24
A11
22
A13
23
A12
+3.3VD_B
DG
DG
IC207
SN74LVC1G04DCKR
1
NC
2
A
3
GND
5
VCC
4
Y
IC208
SN74LVC1G32DCKR
1
A
2
B
3
GND
5
VCC
4
Y
C211
0.1u
16
C209
0.1u
16
*IC203
MT29F8G08ABACAWP-IT:C
1
NC1
2
NC2
46
NC23
47
DNU2
3
NC3
48
VSS4
4
NC4
45
NC22
5
NC5
44
IO7
6
NC6
43
IO6
7
R/*B
42
IO5
8
*RE
41
IO4
9
*CE
40
NC21
10
NC7
39
VCC4
11
NC8
38
DNU1
12
VCC1
37
VCC3
13
VSS1
36
VSS3
14
NC9
35
NC20
15
NC10
34
VCC2
16
CLE
33
NC19
17
ALE
32
IO3
18
*WE
31
IO2
19
*WP
30
IO1
20
NC11
29
IO0
21
NC12
28
NC18
22
NC13
27
NC17
23
NC14
26
NC16
24
NC15
25
VSS2
IC101
AM3352BZCZ60
I-AM3352ZCZ60-2
R1
GPMC_A0
R2
GPMC_A1
R3
GPMC_A2
R4
GPMC_A3
T1
GPMC_A4
T2
GPMC_A5
T3
GPMC_A6
T4
GPMC_A7
U5
GPMC_A8
R5
GPMC_A9
V5
GPMC_A10
R6
GPMC_A11
U1
GPMC_A12
U2
GPMC_A13
U3
GPMC_A14
U4
GPMC_A15
R13
GPMC_A16
V14
GPMC_A17
U14
GPMC_A18
T14
GPMC_A19
R14
GPMC_A20
V15
GPMC_A21
V6
*GPMC_CS0
U9
*GPMC_CS1
V9
*GPMC_CS2
T13
*GPMC_CS3
U18
*GPMC_BE1
T7
*GPMC_OE_RE
U6
*GPMC_WE
U17
*GPMC_WP
R7
*GPMC_ADV_ALE
T6
*GPMC_BE0_CLE
U13
GPMC_AD15
V13
GPMC_AD14
R12
GPMC_AD13
T12
GPMC_AD12
U12
GPMC_AD11
T11
GPMC_AD10
T10
GPMC_AD9
U10
GPMC_AD8
T9
GPMC_AD7
R9
GPMC_AD6
V8
GPMC_AD5
U8
GPMC_AD4
T8
GPMC_AD3
R8
GPMC_AD2
V7
GPMC_AD1
U7
GPMC_AD0
T17
GPMC_WAIT0
V12
GPMC_CLK
R230
0
CL_RXD
CL_TXD
R828
10k
+3.3VD
IC201
B82
LD_IO2
A84
LD_IO3
A85
LD_IO4
A86
LD_IO5
A79
LD_IO6
B83
LD_IO7
A81
NCS1_I
B79
NCS2_I
A80
NWAIT_O
B80
NRD_I
A83
NWR_I
IC201
A3
DSPID_I3
B3
DSPID_I2
A87
DSPID_I1
A88
DSPID_I0
A2
NCS_DSP_O1
B2
NCS_DSP_O0
B1
NIRQ_EXT_I3
B84
NIRQ_EXT_I4
A1
LD_IO1
A7
NCS_SRM_O
A8
LD_IO0
A5
CK50M
R268
10k
R269
10k
R270
10k
R271
10k
+3.3VD
R258
100
1
2
3
45
6
7
8
R266
100
R267
100
DG
LAN_RX_XM1
B40
DATA[2]
nHALT(reserved)
DG
DG
DG
LAN_RX_XP1
The PIN name is a name seen from CPU side.
DG
AD[5]
TDM0_FS_DSP
nCS_DSP[1]
LAN_TX_XM1
DG
AD[6]
DG
AD[3]
DSP_nRST
AD[4]
DATA[7]
TDM0_DR_DSP
DATA[10]
DG
(TDM1_CK)
+15V
DG
CARD_ID[2]
TDM0_DX_DSP
DATA[11]
DG
AD[2]
LAN_TX_XP1
DATA[13]
DG
nINT_DSP0
nCS_DSP[0]
nRST_PORT_PHY
A1
DATA[14]
TDM1_DX_DSP
AD[7]
DG
DSP_CON_No.
+3.3VA
DATA[12]
nINT_DSP1
DATA[8]
CARD_ID[4]
nBE[1]
DATA[15]
DATA[9]
TDM0_CK_DSP
DG
CARD_ID_nOE
(TDM1_FS)
nPRESNT
(DG)
DG
DG
nWE
DATA[6]
CARD_ID[3]
DG
CARD_ID[5]
TDM1_DR_DSP
N.C.
N.C.
CARD_ID[0]
DG
DATA[0]
CARD_ID[6]
B_CLK_66M
A40
DG
DG
B1
nBE[0]
DATA[4]
DATA[1]
+15V
DATA[5]
DATA[3]
AD[1]
CARD_ID[1]
DG
nRD
(No use)
CPU Cortex-A8
DSP CONNECTOR
SRAM 512MB
NC
NC
NAND
1GB/512MB
(No use)
AUDATA3
JTAG_TCK
+3.3VD
TDO
DG
TDI
DG
nCONFIG
nASEBRK
/BRKACK
MPMD
AUDSYNC
DG
TCK
JTAG_+2.5VD(nCS)
AUDATA1
N.C.
ASDI
AUDCK
HARD_nRESET_SW
nTRST
FPGA_nRESET(DATA)
RXD
AUDATA2
TMS
DG
JTAG_TMS
AUDATA0
+3.3VD
TXD
N.C.
nCE
DG
N.C.
DG
CONF_DONE
nRESET
DG
JTAG_TDO
DCLK
N.C.
DG
+3.3VD
JTAG_TDI
+3.3VD
nSRST
ICE CONNECTOR
nWR
nCS
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
N.C.
N.C.
N.C.
confidential
nCS_DSP1
nCS_DSS0
nINT_DSP0
nINT_DSP1
nWR_DSP_option
GPMC_WAIT1
ASIC
ASIC
NS300 : 512MB (C3FBVY000034)
NS500 : 1GB (C3FBWY000029)
NS700 : 1GB (C3FBWY000029)
KX-NS500 CPU BOARD No.2
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