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SV-MP130V BLOCK DIAGRAM
R18
M16
V10
A17
C9
E18
D16 MPMC address 3
MPMC
address 16
MPMC data input/output 0
MPMC data input/output 4
MPMC data input/output 3
MPMC data input/output 2
MPMC data input/output 1
MPMC data input/output 5
MPMC data input/output 7
MPMC data input/output 6
DAI Serial data input
MPMC_NOE:
Output enable for static memories.
Active LOW. Used for static
memory devices.
Output enable for static memories.
Active LOW. Used for static
memory devices.
MPMC_NSTCS_0:
Static memory chip select 0.
Default active LOW. Used
for static memory device.
Static memory chip select 0.
Default active LOW. Used
for static memory device.
U17
U14 T17
T15
J17
H15
B14
A13
A1 A2
A3
B2
A4 B4 A5 B5
G16
IC3
C2HBZG000008
DSP IC
A12
A17
C9
E18
D16
A12
MPMC_BLOUT0:
The signals nMPMCBLSOUT[0]
select byte lane [7:0] on the data bus.
Used for static memories.
The signals nMPMCBLSOUT[0]
select byte lane [7:0] on the data bus.
Used for static memories.
LCD Display
XATLL_OUT
XTALH_IN
HP_OUTR: SDAC Right Headphone Output
HP_OUTCA: HEADPHONE common output reference
HP_OUTCB: HEADPHONE common output reference
ADC_VINR: SADC Right Analog Input
ADC_VINL: SADC Left Analog Input
LCD_RW-WR:
6800 read/write select 8080 active "high" write enable
LCD_E_RD: 6800 enable
8080 active "high" write enable
LCD_DB_4
LCD_DB_5
LCD_DB-7
LCD_DB_6
LCD_DB_1
LCD_DB-3
LCD_DB_2
LCD_RS: 'high' Data
register selsct 'low'
Instruction register select
register selsct 'low'
Instruction register select
LCD_DB-0
LCD_CSB: Chip Select
T1
T4
P3
N1
N2
T10
V9
F3
C2
B3
C1 C3 D2 D1 D3 E2 E3 F2 G2
HP_OUTL: SDAC Left Headphone Output N3
R3
J1
X2
12MHz
15
3.3V
VDD
D18
ADC_MIC:
Microphone Input
Microphone Input
USB_DP: Positive USB data line
usb 2.0 FS
usb 2.0 FS
USB_DM:
Negative USB data line
usb 2.0 FS
Negative USB data line
usb 2.0 FS
USB_RPU: Soft connect output usb 2.0 FS
USB_VBUS:
USB Supply detection line
usb 2.0 FS & usb 2.0
USB Supply detection line
usb 2.0 FS & usb 2.0
USB PORT
CN3
3.3V
USB
CONTROL
CONTROL
MPMC address 2
A18
MPMC_A_6
MPMC address 5
12 MHz clock input
12 MHz clock input
430.0mV P-P
M17
N17
T18
P17
L10
L7
DC_DC_LX2:
Connection to DC/DC2 external coil
Connection to DC/DC2 external coil
DC_DC_LX1:
Connection to DC/DC1 external coil
Connection to DC/DC1 external coil
DC_DC_VBAT:
Battery supply voltage
Battery supply voltage
DC_DC_VUSB:USB supply voltage
MPMC
address 18
IC10
Regulator
DC/DC1 3.3V output voltage
DC/DC1 3.3V input voltage
Analog supply 10-bit ADC
9
7
6
8
13
12
17
16
19
18
42
44
43
41
36
37
32
30
31
29
N.C R/B
RE
CE
Vcc Vss
CLE ALE WE WP
I/O
0
0
I/O
1
1
I/O
2
2
I/O
3
3
Vss
Vcc
I/O
4
4
I/O
5
5
I/O
6
6
I/O
7
7
IC2
FLASH MEMORY
B5
A5
B4
A4
A3
B2
A2
A1
15
14
14
5
7
9
11
13
12
10
8
6
3
4
4
1
2
2
17
16
16
19
18
18
21
20
20
23
22
22
24
CN2 (TO TUNER CIRCUIT CN1)
L17 DC_DC_PLAY
IIC_HDA
IIC_SCL
Key
Control
Control
Notes :
REC Signal Line.
Radio Signal Line.
MP3/FM/IC REC
Signal Line.
Signal Line.
LCD Light
Control
Control
IC8
Regulator
Regulator
3.3V
3.3V
A17
C9
E18
D16
A12
A3
B2
A2
A1
B5
A5
B4
A4
MIC
OPR LED
DD
MAIN BLOCK
B
18
SV-MP130VGK / SV-MP130VGC
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