Read LG 47GA6400-UD / 47GA6450-UD (CHASSIS:LA37G) Service Manual online
System Diagram – Focused on Digital Chip
Flexnoc ( 64 x 40 0 MHz)
AAD AFE
Demod
AFE (CHB)
AFE (1ch)
AFE (3ch)
L9A
L9D
AAD
(BTSC)
GFX
Headphone
Digital
Audio output
UART x3
I2C x12
SPI x2
DMAC
GPIO
WDG
Timer
eMMC/SD
SCI
USB x3
USB PHY
HP out
Line out
Audio L/R
LVDS RX (HS)
LVDS RX (HS)
Tuner
Audio L/R
x6 ch
Tuner
HDMI x4
DAC
SP
DIF
CVBS(CHB)
CVBS(x8ch)
HDMI RX
STP out
Sound
DSP
Speake
r
vpes
MCU
Line out
apes
Component
LVDS TX (HS)
LVDS TX (HS)
LVDS RX (HS)
LVDS TX (HS)
DAC
CVD
SC
SRAM
SMC
CI
eMMC/SD
USB x3
DVB-CI
EB
NANDC
GEM
NAND (SLC)
RGMII/RMII
DDRC
DDR3 PHY
DDRC
DDR3 PHY
DDRC
DDR3 PHY
UART x3
I2C x9
SPI x2
SCI
GPIO
JTAG
Flex
no
c (
64 x
40
0 MHz)
VDEC
core
VDEC
core
VDEC
MCU
SDCAS
DES
TDES
AES
DVB-CSA
SDIO
TP
I0
STP
I1
STP
I0
STP
O
TP
I1
SDCORE
2-channel
time-shared
TP engine
Download
TE
ADEC
VENC
DDR3 x16
DDR3 x16
Flex
no
c (
64 x
40
0 MHz)
DDR3
x16
APB Br
CA9
CA9
L2 $
1MB
DVR
MAU
SDEC
MAU
ADEC
MAU
PREP
MAU
IME
HME
QME
Core
MAU
DEBLOCK
CMC
Audio
DSP
MIC
Ex
tern
al
I
2
S
DAC
ADC
ADC
DIF
SIF
DE
TP out
TP in
(CI)
STP in
(CHB)
TS
PES
DEC
PES
DEC
PES
DEC
Upload
vpes
(thumbnail)
senc
TS
- Dual-core CPU (CA9)
- Dual-core GPU (Mail400)
- Multiple MCU (x4)
- Multiple DSP (x2)
- Multiple DDR3 Channel (x3)
Audio
TS
PREP
CVD
ES
Display
CPU/GPU
ADC
PES
DEC
PESDEC
MAU
SP
ROM
MCU
OTP
Mail400
L2 $
64KB
VP
PP
PP
AHB
Scaler(R)
IPC(R)
NR(R)
Scaler(L)
IPC(L)
NR(L)
MCU
CVE
SMUX
PRE3D
MIXED IPs (Bus)
DCO
Global clock/reset/power mgt.
with PLL + DFT inside
DDR3
PLL
DDR3
PLL
DCO
Display
PLL
CPU
PLL
CRG
+DFT
CRG
+DFT
DISP
IF
ICOD
DEC
JPEG
PNG
ENC
JPEG
SPE
VLC
MAU
AUD
PLL
LVDS TX (HS)
LVDS TX (HS)
LVDS TX (HS)
L9-3D
L9-3D
L9-3D
OSD
Right
Left
PQ(L)
PQ(R)
OSD
Scaler(sub)
2Dto3D
Flex
no
c
Click on the first or last page to see other 47GA6400-UD / 47GA6450-UD (CHASSIS:LA37G) service manuals if exist.