42LH50YR (CHASSIS:LP91B) - LG TV Service Manual (repair manual). Page 28

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THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
URSA_D0P
MEMC_DQSB2
100
R1146
URSA_D1M
URSA_C4M
0.1uF
C1123
MEMC_MCLKZ
URSA_A2M
+1.8V_MEMC
0
R1130 READY
URSA_D3M
0
READY
R1132
MEMC_RXO4+
10uF1
6V
C1150
4.7K
READY
R1129
URSA_C3P
OPC_EN
URSA_C0M
MEMC_MCLK1
M_SPI_CK
URSA_D1M
OPC_OUT2
URSA_D4M
120-ohm
L1103
120-ohm
L1105
OPC_OUT1
URSA_A3P
E-DIM
0.01uF
C1133
MEMC_RXEC+
URSA_B3P
MEMC_DQM0
URSA_B4P
0.1uF
C1134
URSA_D2P
URSA_DCKM
URSA_A0M
URSA_C1P
820
R1110
10uF
C1140
URSA_C2P
URSA_B1M
URSA_B1M
URSA_D4P
+3.3V_MEMC
M_XTALI
1M
R1124
M_SPI_CK
MEMC_DQM3
URSA_CCKP
MEMC_RXE2-
MEMC_DQM2
URSA_D3P
URSA_B2P
0.1uF
C1143
MEMC_DQSB1
MEMC_RXO2+
M_SPI_DO
MEMC_DQS2
0.1uF
C1107
M_XTALO
+3.3V_MEMC
0.1uF
C1152
MEMC_DQS3
URSA_B2M
MEMC_DQSB3
URSA_D1P
MEMC_RXE4-
URSA_C0P
M_SDA
MEMC_DQM1
0.1uF
C1119
BLM18PG121SN1D
L1106
MEMC_DQ[0-15]
ISP_RXD_TR
URSA_B0P
56
R1121
URSA_B3M
100
R1153
URSA_D3P
0
R1109
100
R1154
MEMC_RXE1-
0.1uF
C1101
0.1uF
C1142
100
R1157
URSA_A1P
URSA_BCKM
100
R1152
URSA_A4P
MEMC_RXO1-
M_SPI_DI
100
R1155
MEMC_RXO0+
URSA_B1P
URSA_C3P
100
R1156
URSA_A4M
MEMC_DQ[16-31]
56
R1125
1K
READY
R1115
22uF
16
V
C1115
URSA_C2P
URSA_B3M
0.1uF
C1136
URSA_C1M
URSA_DCKP
URSA_BCKP
+3.3V_MEMC
22uF
C1139
LVDS_SEL
+3.3V_MEMC
MEMC_RXOC-
+1.26V_MEMC
URSA_C3M
+3.3V_MEMC
MEMC_RXE3+
120-ohm
L1104
URSA_D2M
URSA_C0P
URSA_ACKM
URSA_A3M
URSA_D0M
10K
R1104
10K
R1103
ISP_RXD_TR
MEMC_RXO3+
10uF
10V
C1126
MEMC_RXE1+
URSA_BCKM
URSA_D2M
0.1uF
C1109
1K READY
R1102
URSA_A2P
0.1uF
C1149
URSA_C2M
URSA_B2P
URSA_B1P
URSA_A1M
URSA_D2P
1uF
C1103
10uF
C1116
0.1uF
C1130
1K
R1101
+3.3V_MEMC
URSA_D4P
URSA_A0P
URSA_C4P
URSA_ACKP
LED_DEMO
0.1uF
C1110
MEMC_RXE0-
0.1uF
C1137
0.1uF
C1124
URSA_CCKM
ISP_TXD_TR
0.1uF
C1105
URSA_C4M
0.1uF
C1108
URSA_C4P
0.1uF
C1144
0.1uF
C1114
URSA_B0M
120-ohm
L1101
0.1uF
C1122
URSA_A4P
AFLC_EN
15pF
C1147
MEMC_ODT
URSA_A0P
URSA_B0M
LED_DEMO
URSA_B3P
MEMC_RXOC+
LVDS_SEL
1K
R1116
MEMC_MCLK
0.1uF
C1113
URSA_A1P
URSA_C0M
MEMC_RASZ
URSA_C1P
URSA_B0P
0.1uF
C1141
MEMC_RXE3-
15pF
C1148
MEMC_WEZ
0.1uF
C1125
MEMC_RXO3-
MEMC_RXE4+
120-ohm
L1102
MEMC_RXO4-
MEMC_DQSB0
0.1uF
C1102
MEMC_BA1
AFLC_EN
0.1uF
C1128
URSA_D0P
1K
READY
R1117
URSA_D0M
ISP_TXD_TR
MEMC_RXE2+
URSA_C3M
URSA_BCKP
10uF
C1121
M_SPI_CZ
0.1uF
C1138
URSA_C2M
10K
R1122
URSA_A3M
MEMC_DQS0
1K
R1114
MEMC_CASZ
M_SPI_CZ
+3.3V_MEMC
MEMC_MCLKE
MEMC_RXO1+
URSA_B4M
URSA_ACKM
URSA_D1P
URSA_A2M
0.1uF
C1131
56
R1120
0.1uF
C1129
URSA_A4M
URSA_A3P
URSA_D4M
10K
R1111
W25X20AVSNIG
IC1101
IC1101_URSA
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
+12V_LCD
MEMC_A[0-12]
10uF
C1117
0.1uF
C1145
MEMC_BA0
MEMC_DQS1
56
R1126
M_SPI_DI
M_SCL
M_XTALI
0.1uF
C1132
0.1uF
C1118
10uF
10
V
C1120
URSA_ACKP
URSA_A2P
0.1uF
C1111
1uF
C1135
0.1uF
C1112
URSA_A1M
MEMC_RESET
MEMC_RXO0-
URSA_CCKP
12MHz
X1101
URSA_B2M
10uF
C1127
0.1uF
C1106
URSA_B4M
MEMC_MCLKZ1
MEMC_RXE0+
22uF
16
V
C1104
URSA_A0M
0.1uF
C1146
+3.3V_MEMC
URSA_DCKM
URSA_B4P
MEMC_RXO2-
URSA_DCKP
+3.3V_MEMC
100
R1151
M_SPI_DO
+3.3V_MEMC
100
R1150
MEMC_RXEC-
M_XTALO
100
R1149
URSA_C1M
100
R1148
1000pF
C1151
URSA_CCKM
URSA_D3M
100
R1147
SMW250-04
P1103
DEBUG
1
2
3
4
0
READY
R1141
0
R
11
13
VESA
0
OPC_EN
R1145
0
READY
R1143
0
READY
R1140
0
R
11
19
READY
0
R
11
36
NOT_SBL
0
OPC_DIS
R1144
0
READY
R1137
0
READY
R1142
22
R1138
22
OPC_EN
R1128
22
SBL
R1123
22
R1139
4.7K
READY
R1134
4.7K
READY
R1133
4.7K
READY
R1135
4.7K
R1112 JEIDA
4.7K
READY
R1131
4.7K
READY
R1118
470
R1127
[E1]
[D1]
[L9]
[N5]
[N4]
[N12]
[N13]
LGE7329A
IC1100
E1
SDAS
D
1
SCLS
F1
GPIO[8]
G
1
GPIO[9]
K8
GND_14
E5
VDDC_1
E2
GPIO[10]
F2
GPIO[11]
F3
GPIO[12]
G
2
GPIO[13]
M
4
GPIO[22]
M
5
GPIO[23]
G
3
GPIO[14]
E4
GPIO[15]
F4
GPIO[16]
G
4
GPIO[17]
H
4
GPIO[18]
J4
GPIO[19]
K
4
GPIO[20]
L4
GPIO[21]
J6
VDDP_2
H
9
GND_7
F6
VDDC_2
H
1
MDATA[20]
H
2
MDATA[19]
H
3
MDATA[17]
J1
MDATA[22]
J2
MDATA[27]
J3
MDATA[28]
K
1
MDATA[25]
K
2
MDATA[30]
K
6
AVDD_DDR_2
K
3
DQM[3]
L1
DQM[2]
J8
GND_10
L2
DQS[2]
L3
DQSB[2]
L6
AVDD_DDR_4
L8
VDDP_3
H
10
GND_8
M
1
DQS[3]
M
2
DQSB[3]
L7
AVDD_DDR_5
M
3
MDATA[31]
N
1
MDATA[24]
J9
GND_11
N
2
MDATA[26]
N
3
MDATA[29]
L1
0
AVDD_DDR_6
P1
MDATA[23]
R
1
MDATA[16]
T1
MDATA[18]
T2
MDATA[21]
R2
MCLK[0]
P2
MCLKZ[0]
G
7
GND_1
L9
AVDD_MEMPLL
N
5
MVREF
N
4
ODT
T3
RASZ
R3
CASZ
P3
MADR[0]
T4
MADR[2]
R4
MADR[4]
J10
GND_12
P4
MADR[6]
T5
MADR[8]
R5
MADR[11]
P5
W EZ
T6
BADR[1]
R6
BADR[0]
P6
MADR[1]
T7
MADR[10]
L11
AVDD_DDR_7
R7
MADR[5]
P7
MADR[9]
T8
MADR[12]
R8
MADR[7]
P8
MADR[3]
N8
M CL
K E
K10
GND_16
F7
VDDC_3
T9
MDATA[4]
R9
MDATA[3]
K7
GND_13
P9
MDATA[1]
T10
MDATA[6]
K11
AVDD_DDR_3
R10
MDATA[11]
P10
MDATA[12]
T11
MDATA[9]
R11
MDATA[14]
J11
AVDD_DDR_1
P11
DQM[1]
T12
DQM[0]
R12
DQS[0]
P12
DQSB[0]
H11
VDDP_1
T13
DQS[1]
R13
DQSB[1]
P13
MDATA[15]
T14
MDATA[8]
R14
MDATA[10]
P14
MDATA[13]
T15
MDATA[7]
R15
MDATA[0]
P15
MDATA[2]
T16
MDATA[5]
R16
MCLK[1]
P16
MCLKZ[1]
N9
GPIO[26]
N10
GPIO[27]
N11
GND_17
M11
RESET
G6
VDDC_4
N12
GPIO[28]
N13
GPIO[29]
N14
GPIO[30]
L13
SCK
M13
SDI
M12
SDO
K13
CSZ
L12
PWM1
K12
PWM0
J13
GPIO[0]
H13
GPIO[1]
G13
GPIO[2]
F13
GPIO[3]
E13
GPIO[4]
F12
GPIO[5]
D14
GPIO[6]
E12
GPIO[7]
N6
GPIO[24]
H6
VDDC_5
N15
LVD4M
N16
LVD4P
M14
LVD3M
M15
LVD3P
F8
AVDD_33_1
M16
LVDCKM
L16
LVDCKP
L15
LVD2M
L14
LVD2P
G9
GND_3
K14
LVD1M
J14
LVD1P
J16
LVD0M
J15
LVD0P
H15
LVC4M
H16
LVC4P
H14
LVC3M
G14
LVC3P
G16
LVCCKM
G15
LVCCKP
F15
LVC2M
F16
LVC2P
F14
LVC1M
E14
LVC1P
E16
LVC0M
E15
LVC0P
G10
GND_4
F9
AVDD_33_2
D16
LVB4M
D15
LVB4P
C16
LVB3M
B16
LVB3P
A16
LVBCKM
A15
LVBCKP
B15
LVB2M
C15
LVB2P
D2
GPIO_3
E3
GPIO_10
E10
GPIO_11
D10
GPIO_7
D8
GPIO_5
D12
REXT
C14
L VB
1 M
C13
LVB1P
A13
L VB
0 M
B13
LVB0P
D7
GPIO_4
D9
GPIO_6
B12
L VA
4 M
A12
LVA4P
C12
L VA
3 M
C11
LVA3P
A11
L VA
C KM
B11
L VA
C KP
B10
L VA
2 M
A10
LVA2P
C10
L VA
1 M
C9
LVA1P
A9
L VA
0 M
B9
LVA0P
F10
AVDD_PLL
G8
GND_2
D11
GPIO_8
D13
GPIO_9
E11
GPIO_12
N7
GPIO[25]
D6
S CL
M
D5
S DA
M
A14
GPIO_1
B14
GPIO_2
D3
XIN
D4
X OU
T
K16
GPIO_14
K15
GPIO_13
H7
GND_5
G11
AVDD_LVDS_2
B8
RO0N
A8
RO0P
C8
RO1N
C7
RO1P
A7
RO2N
B7
RO2P
B6
R OC
K N
A6
R OC
K P
C6
RO3N
C5
RO3P
A5
RO4N
B5
RO4P
H8
GND_6
F11
AVDD_LVDS_1
B4
RE0N
A4
RE0P
C4
RE1N
C3
RE1P
A3
RE2N
B3
RE2P
B2
R EC
K N
A2
RECKP
C2
RE3N
C1
RE3P
A1
RE4N
B1
RE4P
GND_9
J7
GND_15
K9
0
R1106
0
R1105
100
R1107
100
R1108
CIC21J501NE
L1107
TF05-51S
P1101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
TF05-41S
P1102
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
1K READY
R1159
1K
R1160
1K READY
R1100
1K
R1158
+3.3V_MEMC
0
READY
R1161
RT1C3904-T112
Q1101
E
B
C
+3.3V_MULTI_MST
JP1100
JP1102
JP1101
0
READY
R
11
62
MEMC_DQ[25]
MEMC_DQ[8]
MEMC_A[7]
MEMC_DQ[0]
MEMC_DQ[10]
MEMC_DQ[11]
MEMC_DQ[24]
MEMC_DQ[17]
MEMC_DQ[29]
MEMC_DQ[1]
MEMC_DQ[7]
MEMC_DQ[6]
MEMC_DQ[15]
MEMC_DQ[28]
MEMC_DQ[3] 
MEMC_DQ[4]
MEMC_DQ[30]
MEMC_DQ[31]
MEMC_A[2]
MVREF
MEMC_A[4]
MEMC_A[12]
MEMC_DQ[9]
MEMC_A[11]
MEMC_DQ[18]
MEMC_DQ[12]
MEMC_A[10]
MEMC_DQ[5]
MEMC_A[0]
MEMC_DQ[19]
MEMC_DQ[13]
MEMC_DQ[14]
MEMC_A[3]
MEMC_DQ[27]
MEMC_DQ[21]
MEMC_A[1]
MEMC_A[6]
MEMC_DQ[2]
MEMC_DQ[20]
MEMC_DQ[23] MEMC_DQ[16]
MEMC_A[8]
MEMC_A[9]
MEMC_DQ[26]
MEMC_DQ[22]
MEMC_A[5]
EAX58017401 Mstar LCD LH50
11  12
H6 LH50
2008/12/23
MEMC & LVDS Out
LOW
HIGH
SPI FLASH
I2C
SPI
HIGH
PWM0
HIGH
LOW
PWM1
EEPROM
HIGH
HIGH
HIGH
Closed to IC1100
HIGH
XTAL
GPIO8
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