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[e] Stapler (SU)
The stapler unit includes the staple motor (STPM), the stapler home position sensor (SHPS), and the staple near end sensor (NNSE).
For SHPS and NNES, refer to A-[q] and [r].
STPM controls the rotation, stop and rotating direction. It is composed of the G/A (IC5) and the bridge circuit composed of the FET (Q2, Q3, Q19,
and Q20).
The motor rotation, stop, and rotating direction are controlled by the combinations of binary logic inputted from the CPU (IC9) to the G/A (IC5)
through the data bus. By this control, the control signal is outputted to the G/A (IC5-20
For SHPS and NNES, refer to A-[q] and [r].
STPM controls the rotation, stop and rotating direction. It is composed of the G/A (IC5) and the bridge circuit composed of the FET (Q2, Q3, Q19,
and Q20).
The motor rotation, stop, and rotating direction are controlled by the combinations of binary logic inputted from the CPU (IC9) to the G/A (IC5)
through the data bus. By this control, the control signal is outputted to the G/A (IC5-20
~
23 pin).
These signals are inputted to the bridge circuit.
C27, C28, and C108
C27, C28, and C108
~
C111 are for absorbing noises.
Q10 and Q11 are used to turn on Q2 and Q3 respectively.
R78, R79, R81, R83, R84 are the dividing resistances used to obtain VGS of the FET.
R78, R79, R81, R83, R84 are the dividing resistances used to obtain VGS of the FET.
D. Other circuits
[a] Reset circuit
This circuit generates the rest signal of the CPU and the G/A. It is composed of IC8 and its peripheral circuits.
IC8 is provided with the power on reset function when supplying the power and the reset function in case of abnormal decrease of +5V. The reset
state is held until a certain time passes from the time when the power line reached about 4.3V after supplying the power. The reset holding time is
set with the capacity of C82.
This circuit is provided also with the watchdog timer function. The watchdog timer is built in the G/A (IC5), and it starts operation when the RESET
pin becomes HIGH. This monitors hung up or other abnormality of the CPU.
The monitoring method is: The initial value (data) is written from the CPU to the G/A. This data is counted down inside the G/A. Normally the data is
rewritten before returning to the initial value. In case of hung up of the CPU, however, the data is not returned to the initial value and the counter
becomes zero.
At that time, the G/A resets the CPU and retries until the CPU gets started again.
C48, C49, and C51 are for absorbing noises.
IC8 is provided with the power on reset function when supplying the power and the reset function in case of abnormal decrease of +5V. The reset
state is held until a certain time passes from the time when the power line reached about 4.3V after supplying the power. The reset holding time is
set with the capacity of C82.
This circuit is provided also with the watchdog timer function. The watchdog timer is built in the G/A (IC5), and it starts operation when the RESET
pin becomes HIGH. This monitors hung up or other abnormality of the CPU.
The monitoring method is: The initial value (data) is written from the CPU to the G/A. This data is counted down inside the G/A. Normally the data is
rewritten before returning to the initial value. In case of hung up of the CPU, however, the data is not returned to the initial value and the counter
becomes zero.
At that time, the G/A resets the CPU and retries until the CPU gets started again.
C48, C49, and C51 are for absorbing noises.
Staple motor drive circuit
Staple motor
(STPM)
(STPM)
Reset circuit
11 – 12
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