Read Sony DCR-TRV900 Service Manual online
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3-3. MAIN Signal Flow Description
HONEY (IC756)
The HONEY IC interfaces the signals between the DRAM (IC752) and the JPEG
(IC757) or between the DRAM (IC752) and the VFD (IC1501) when process-
ing the compressed signal to be memorized into the MS (memory stick) in mainly
the progressive mode.
The video signal passes through this circuit in the interlaced mode.
During the photo mode recording in the progressive mode, the video signal that
is equivalent to one frame video signal is stored in the DRAM (IC752). Then
the video signal is read and written in the memory inside the VFD in the form of
the odd signal and the even signal via HONEY. This signal is recorded on tape
for the six seconds.
VFD (IC1501)
The VFD performs various signal processing as follows.
(1) Main video signal processing
The VFD processes the recording signal data to be recorded tape, and also
processes the video data that is sent to the DV terminal. Concretely, it per-
forms blocking for the signal compression and shuffling.
(2) Y and color difference signal output to EVF and LCD
The Y and color difference digital data that are supplied from the HONEY,
are D/A converted by the VFD from which the Y, CR and CB signals are
output to EVF and LCD from pins-&™, &¢ and &§.
(3) Y/C signal output to LINE OUT
The Y and color difference digital data are D/A converted by the VFD, and
are encoded to produced the pure chroma signal. As the result of encoding,
the Y and C signals are output to LINE OUT connector from pins-^¡ and ^•.
(4) Switching of video signals
Either the video input signal from the camera block or the video input signal
from the LINE IN connector, is selected by the VFD.
SFD (IC1600)
The SFD continues the signal compression processing after the VFD. It per-
forms DCT, quantization, VLC and framing process of the signal compression
processing. In the SFD, the audio signal from MIC and LINE IN connectors are
mixed after they are converted to the digital signal by IC2002. Then the com-
pressed digital data takes the two output paths. One output goes to the DV
terminal as the digital signal data through the DV interface IC (IC1602). The
other output is sent to IC1601.
TFD (IC1601)
The digital signal data that is supplied from the SFD, receives de-shuffling,
error correction coding, channel coding and TBC processing in the TFD. Out-
put signal from the TFD is sent to the TRX (IC1900).
TRX (IC1900)
The signal data that is supplied from TFD to the TRX (IC1900) is in the format
of the parallel data. Clock frequency of the parallel data is replaced by the 40
MHz clock and at the same time the parallel data is converted to the serial data
in the TRX.
The signal data is amplified by the record amplifier (IC1816) and is recorded
through the recording heads.
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