Read Sony DCR-TRV22 / DCR-TRV22E Service Manual online
DCR-TRV22/TRV22E
COVER
COVER
4-49
4-50
VC-312 (7/14)
For Schematic Diagram
• Refer to page 4-85 for printed wiring board.
• Refer to page 4-85 for printed wiring board.
4-2. SCHEMATIC DIAGRAMS
VC-312 BOARD SIDE A
VC-312 BOARD SIDE B
4-2. SCHEMATIC DIAGRAMS
VC-312 BOARD SIDE A
VC-312 BOARD SIDE B
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
and the Transistors with mark,is
not possible.
VSP_SI
FCLR
LBUS3
XACC
DIR
LBUS0
XENA
LBUS2
LBUS1
FRL
TRCKO
SFD_BCK
ADATAIN1
DSCK_LK
FRAT_REFO
FS_EDGE_REF
SFD_LRCK
ADATAIN0
0.1u
C2322
D_1.5V
D_2.8V
REG_GND
0.1u
C2304
0.1u
C2305
0.1u
C2303
0.1u
C2320
0.1u
C2307
XX
C2313
XX
R2303
XX
C2317
XX
R2304
XX
D2301
XX
R2308
XX
R2305
XX
L2305
XX
C2316
XX
C2314
XX
C2315
XX
D2302
XX
R2309
RFIN
R2307 0
0.1u
C2310
0.1u
C2308
0.1u
C2306
R2306 XX
R2302
0
A_2.8V
0
R2311
4.7u
B
C2302
10uH
L2301
10uH
L2304
4.7u
B
C2312
4.7u
B
C2311
10uH
L2303
4.7u
B
C2318
10uH
L2307
4.7u
B
C2319
10uH
L2306
10uH
L2302
4.7u
B
C2301
VCK
RCO1_EDVD
HCO_FYI1
VLAT_SYNC_FCI
HYI_PLL27IN
RCO2_EDFLD
RCO0_EDHD
RCO3_FRMREF
HYO_SLGATE
THCRQ_FHDI
RYO0_DEHD
FLAT_SYNC_FYO0
RYO1_DEVD
VLAT_IN_FYO1
THYRQ_FVDI
RYO2_DEFLD
RYO3_SGOUT
TFS_FCO
RECA1
RECA2
RECCK
RECDT
DRP
XVSP_SCK
ATF_LATCH
XSYS_RST
VSP_SO
XCS_IC2301
XCS_IC2201
ALE
WRX
RDX
D31A07
D30A06
D29A05
D28A04
D27A03
D26A02
D25A01
D24A00
0
R2310
0uH
FB2302
0.1u
B
C2321
A_1.5V
0
R2301
XX
C2309
SWP
DXXA09
DXXA08
FRRV
TRRT
TRRV
RYI0_DE0
RYI1_DE1
RYI2_DE2
RYI3_DE3
HCI_FYI0
RCI0_DE4
RCI1_DE5
RCI2_DE6
RCI3_DE7
MFLG_QRST
ADATAOUT0
ADATAOUT1
CL2301
0
R2312
XX
C2323
0
R2313
10uH
L2308
4.7u
B
C2324
0
R2314
CL2323
CL2322
CL2321
CL2302
CL2303
CL2304
CL2308
CL2309
CL2310
CL2311
CL2312
CL2313
CL2317
CL2316
CL2320
0.1u
B
C2325
0
R2318
XX
R2321
XX
C2326
XX
C2327
XX
L2309
XX
L2310
XRST_VTR
R2322
XX
UPD15002FC-DN2
IC2301
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96
97
98
99
100
101
102
103
104
105
106
107
1
08
109
110
1
11
112
113
1
14
115
116
1
17
118
1
19
120
1
21
122
123
1
24
125
126
127
1
28
129
130
131
1
32
133
134
135
136
137
138
1
39
1
40
141
142
143
144
44
52
43
51
42
50
41
49
40
48
39
47
38
46
37
45
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
RP_2.8V
0
R2325
XX
R2326
XX
R2327
XX
R2328
1
A
HYO_SLGATE
RYO0_DEHD
RYO1_DEVD
RYO2_DEFLD
RYO3_SGOUT
HCO_FYI1
RCO0_EDHD
RCO1_EDVD
RCO2_EDFLD
RCO3_FRMREF
HYI_PLL27IN
RYI0_DE0
RYI1_DE1
RYI2_DE2
RYI3_DE3
HCI_FYI0
RCI0_DE4
RCI1_DE5
RCI2_DE6
RCI3_DE7
MFLG_QRST
TFS_FCO
THYRQ_FVDI
THCRQ_FHDI
VLAT_SYNC_FCI
FLAT_SYNC_FYO0
VLAT_IN_FYO1
DSCK_LK
FS_EDGE_REF
FRAT_REFO
SFD_BCK
SFD_LRCK
ADATAIN0
ADATAIN1
ADATAOUT0
ADATAOUT1
VSP_SI
VSP_SO
XCS_IC2301
XCS_IC2201
ALE
WRX
D31A07
D30A06
D29A05
D28A04
D27A03
D26A02
D25A01
D24A00
FRRV
DRP
TRRT
TRRV
RDX
XENA
DIR
FCLR
FRL
LBUS3
LBUS2
LBUS1
LBUS0
RECA1
RECA2
RECDT
XVSP_SCK
ATF_LATCH
TRCKO
RECCK
RFIN
XACC
HYI_PLL27IN
RYI0_DE0
RYI2_DE2
FLAT_SYNC_FYO0
MFLG_QRST
SFD_BCK
TRCKO
FCLR
XENA
XVSP_SCK
D25A01
D31A07
RDX
TRRV
TRRT
TFS_FCO
RECA2
RECA1
DIR
FRL
D24A00
D28A04
ALE
FRRV
DRP
SWP
RCO0_EDHD
RCO2_EDFLD
R
YI1_DE1
R
YI3_DE3
HCI_FYI0
VLA
T
_IN_FYO1
SFD_LRCK
RYO2_DEFLD
RCO1_EDVD
RCO3_FRMREF
RCI0_DE4
RCI2_DE6
RCI3_DE7
ADATAOUT1
ADATAIN1
FS_EDGE_REF
RFIN
LBUS0
LBUS2
XACC
D26A02
D29A05
WRX
DXXA08
A
TF_LA
T
CH
VSP_SI
XCS_ROT
A
HYO_SLGA
TE
HCO_FYI1
RCI1_DE5
ADA
T
AOUT0
ADA
T
AIN0
FRA
T_REFO
LBUS1
LBUS3
XCS_LIP
D27A03
D30A06
DXXA09
VSP_SO
THYRQ_FVDI
XSYS_RST
DXXA09
DXXA08
DSCK_LK
RECCK
THCRQ_FHDI
R
YO1_DEVD
RYO0_DEHD
XRST_VTR
VLA
T
_SYNC_FCI
RECDT
XRST_VTR
XSYS_RST
SWP
R
YO3_SGOUT
AMC
MSSCK
AGND
N.C.
IOVDD2(3.0V)
INTV1(1.5V)
MSCSS
MA2
MA6
MA10
IOVDD1(3.0V)
IOGND1(3V)
INTV2(1.5V)
HYO
YO0
YO2
TICK
IOGND3(3.0V)
SMC
FLAT_SYNC
TMFLG
INTG3(1.5V)
BCK
INTV3(1.5V)
MDQ1
MDQ5
IOGND2(3.0V)
PBCK
ADDT0
PLLSW
INTV4(1.5V)
N.C.
IOVDD3(3.0V)
TRST
DICK
INTV5(1.5V)
NC
DICO_DVDD
VRT
ADGND
OSCIN
OVDD
RECCKO
PLLSVDD
N.C.
INTG5(1.5V)
RECDT
IOGND5(3.0V)
RECA2
RECA1
TEST
INTG6(1.5V)
LDIR
INTV6(1.5V)
FRL
MCDA0
MCDA4
INTG7(1.5V)
ALE
FRRV
DRP
SWP
IOGND6(3.0V)
N.C.
XRST
N.C.
N.C.
N.C.
N.C.
THCRQ
INTG2(1.5V)
CI0
CI2
YO1
YO3
IOVDD4(3.0V)
HCO
VLA
T_SYNC
VLA
T_IN
LRCK
MDQ0
MDQ2
MDQ6
INTG4(1.5V)
ADDT3
N.C.
PLLMSK
N.C.
IOGND7(3.0V)
INTG8(1.5V)
NC
DGND
ADVDD
VRB
OSCOUT
PCOR
PLLRVDD
IOGND4(3.0V)
PLLSGND
IOVDD6(3.0V)
CCDMODE0
TEST1
CCDMODE1
TRCKO
FCLR
XENA
MCDA1
INTV7(1.5V)
MCDA7
RDX
TRRV
TRRT
INTG1(1.5V)
N.C.
N.C.
N.C.
TFS
YI0
YI2
CI1
CI3
CO0
CO2
CO3
ADATAOUT1
ADATAIN1
FS_EDGE_REF
MDQ3
MDQ7
ADDT5
ADDT2
N.C.
N.C.
N.C.
N.C.
DICO_AVDD
RFIN
OSCVDD
OGND
PLLRGND
TGCK
INTV8(1.5V)
N.C.
TEST2
BUNRI
LBUS0
LBUS2
XACC
MCDA2
MCDA5
WRX
MCHA0
A
TFSMPL
MSO2MC
MSCSR
MA5
MA9
THYRQ
YI1
YI3
HYI
HCI
CO1
ADA
T
A
OUT0
A
D
ATA
IN
0
FRA
T_REFO
MDQ4
MDQ8
ADDT4
ADDT1
N.C.
N.C.
NC
VRC
NC
OSCGND
IOVDD5(3.0V)
INTG9(1.5V)
SPCKO
N.C.
TEST3
N.C.
LBUS1
LBUS3
MCCE
MCDA3
MCDA6
SCWIN
MCHA1
MSI2ROTA
27M
N.C.
N.C.
IC2301
DV SIGNAL PROCESS
CSP(CHIP SIZE PACKAGE)IC
(12/14)
42
42
(11/14)
42
(13/14)
(8/14)
43
(12/14)
43
(12/14)
44
15
(3/14)
45
(8/14)
15
(12/14)
(12/14)
9
9
(14/14)
9
9
(1/14)
(11/14)
25
(12/14)
25
(3/14)
(14/14)
25
(14/14)
46
(12/14)
46
(9/14)
46
(9/14)
47
(14/14)
48
(1/14)
3
22
(3/14)
28
(5/14)
28
(3/14)
28
(6/14)
VC-312 BOARD(7/14)
XX MARK:NO MOUNT
DV SIGNAL PROCESS(R BLOCK)
10
G
H
5
13
M
L
6
E
3
8
B
12
D
C
9
2
4
7
J
I
17
16
18
F
K
11
15
14
16
PB
SIGNAL PATH
VIDEO SIGNAL
CHROMA
REC
SIGNAL
Y
Y/CHROMA
AUDIO
Ref.signal
SIGNAL PATH
PB
REC
REC/PB
(6/14)
25
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