Read Sony DVP-CX777ES Service Manual online
102
DVP-CX777ES
7-44.
IC PIN FUNCTION DESCRIPTION
•
MB BOARD IC104 MB91307RPFV-G-BND-E1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 5
HA17 to HA21
O
Address signal output terminal
6
(NOT_USED)
O
Not used
7
WP
O
Write protect signal output to the EEPROM
8
XSACS
O
Chip select signal output to the DSD decoder
9
AVCC
—
Power supply terminal (+3.3V)
10
AVRH
—
Reference voltage input (+3.3V) terminal
11
AVSS
—
Ground terminal
12
DISC_AD
I
Disc detect sensor input terminal
13, 14
MOD_SET1,
MOD_SET2
I
Mode setting input terminal
15
IPSW
I
Scan select switch input terminal
16
XAVDECINT
I
Interrupt signal input from the AV decoder
17
XARPINT
I
Interrupt signal input from the DSP
18
XSDSPINT
I
Interrupt signal input from the DSP
19
XGAINT
I
Interrupt signal input from the mechanism controller
20
XIFINT
I
Interrupt signal input from the interface controller
21
XADSPINT0
I
Interrupt signal input from the audio DSP
22
XADSPINT1
I
Interrupt signal input terminal Not used
23
XSARDY
I
Ready signal input from the DSD decoder
24
VCC
—
Power supply terminal (+3.3V)
25
IFSI
I
Serial data input from the interface controller
26
IFSO
O
Serial data output to the interface controller
27
IFSC
O
Serial clock signal output to the interface controller
28
SIN1
I
Serial data input from the audio DSP, digital audio processor and DSD decoder
29
SOUT1
O
Serial data output to the audio DSP, D/A converter, digital audio processor and DSD decoder
30
SCK1
O
Serial clock signal output to the audio DSP, D/A converter, digital audio processor and DSD
decoder
decoder
31
RX
I
Serial data input terminal (for check)
32
TX
O
Serial data output terminal (for check)
33
XDVD/SACD
O
DVD/SACD selection signal output terminal Not used
34
VSS
—
Ground terminal
35
XRSTO
O
Reset signal output to the DSP, AV decoder, audio DSP, D/A converter, mechanism controller
and digital audio processor “L”: reset
and digital audio processor “L”: reset
36
WIDE
O
Wide control signal output terminal
37
(RGBSEL)
O
Not used
38
SDA
I/O
Two-way data bus with EEPROM, I/P converter and D/A converter
39
SCL
O
Serial clock signal output to the EEPROM, I/P converter and D/A converter
40
XSARST
O
Reset signal output to the DSD decoder “L”: reset
41
(EUROY/V)
O
Not used
42
(ISEL)
O
Not used
43
MODE_SELECT0
I
Mode selection signal input terminal (Fixed at “H” in this set)
44, 45
MODE_SELECT1,
MODE_SELECT2
I
Mode selection signal input terminal (Fixed at “L” in this set)
46
AVDREQ0
I
Request signal input from the AV decoder
47
AVDDACK0
O
Acknowledge signal output to the AV decoder
48
XDRVMUTE
O
Drive muting signal output to the motor/coil driver
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