Read Sony XR-C9100R Service Manual online
– 56 –
CONTROL
CIRCUIT
LOW VCC
DETECTOR CIRCUIT
WRITE/ERASE
PULSE TIMER
PULSE TIMER
ERASE CIRCUIT
RY/BY
BUFFER
CHIP ENABLE/
OUTPUT ENABLE
CIRCUIT
I/O
BUFFER
DATA
LATCH
ADDRESS
LATCH
Y
DECODER
8,388,608
CELL
MATRIX
Y GATE
WRITE CIRCUIT
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
DQ3
DQ11
VCC
DQ4
DQ12
DQ5
DQ13
DQ7
DQ14
DQ6
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
GND
CE
OE
1
2
3
4
4
5
6
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
21
22
A8
A9
A15
A14
A13
A13
A12
A11
NC
RY/BY
WE
A7
A6
A6
A4
A5
NC
NC
RESET
NC
47
48
45
46
A3
A2
A2
A1
A17
A10
X
DECODER
A16
BYTE
GND
DQ15/A–1
A0
STB
STB
A18
24
21
23
22
20
19
18
17
TIMING AND
CONTROL
POWER
CONTROL
9
10
DACOUT
SH
AIN1
AIN0
BUF OUT
/PWM
TE1/PWM
A VDD
GND
A GND
D0
D7
XML
XMH
WRD
RDD
WRC
RDC
RDD
WRC
RDC
GND
VDD
VDD
CLK
DO
CE
DI
DI
REQ
P.05
IGAIN0
IGAIN0
SLEEP
PDN
WAKEUP
LOGIC
LOGIC
XI 2
XO 2
GND
A1
A0
XO 1
XI 1
RESET
GND
VDD
V.CONT(-12dB)
V.CONT(-6dB)
OE
CE
A19
A18
A17
A16
IGAIN1
VDD
OSC
2
TIMER
2
OSC
1
DAC
ADC
TIMER
1
25 26 27 28 29 30 31
39
45
44
43
42
41
40
32
38
37
36
35
34
33
37
36
35
34
33
47
48
51
49
53
54
55
56
52
1
64–57
50
46
PULSE WIDTH
MODULATOR
EXTERNAL
MEMORY
INTERFACE
INTERRUPT LOGIC
PORT 1
PORT 0
REGISTER SPACE
384 bytes
ANALOG
CONTROL
32K x 8
32K x 8
low
high
STACK SPACE
8 bytes
CPU
INTERNAL ROM
ADC MIX
1
8
A15
A8
11
16
A7
A2
WRD
RDD
WRC
RDC
IC900 MBM29F800-DISPU
IC903 RSC-164
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