Read Sony XDC-40 / XR-C5100 Service Manual online
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Pin No.
Pin Name
I/O
Function
66
LCDSO
O
Serial data output to the liquid crystal display driver (IC901)
67
LCDINH
O
Blank indicate control signal output to the liquid crystal display driver (IC901)
“L”: no display
“L”: no display
68
UNICKI
I
Serial data reading clock signal input terminal (for SONY bus)
69
UNISO
O
Serial data output to the bus interface (IC581) (for SONY bus)
70
UNISI
I
Serial data input from the bus interface (IC581) (for SONY bus)
71
UNICKO
O
Serial data transfer clock signal output to the bus interface (IC581) (for SONY bus)
72
BUSON
O
Bus on/off control signal output to the bus interface (IC581) (for SONY bus) “L”: bus on
73
SYSRST
O
Reset signal output to the bus interface (IC581) (for SONY bus) “L”: reset
74
VREG
O
CPU regulator output terminal Connected to capacitor
75
GND
—
Ground terminal
76
X OUT
O
Main system clock output terminal (4.5 MHz)
77
X IN
I
Main system clock input terminal (4.5 MHz)
78
CE
I
CPU chip enable signal input (fixed at “H”)
79
VDD1
—
Power supply terminal (+5V)
80
RESET
I
System reset signal input from the reset signal generator (IC551) and reset switch (S551)
“L” is input for several 100 msec after power on, then it changes to “H”
“L” is input for several 100 msec after power on, then it changes to “H”
*1 loading/tape operation motor control
MODE
TERMINAL
LM LOD (pin 8)
“L”
“H”
“L”
“H”
LM EJ (pin 9)
“L”
“L”
“H”
“H”
STOP
LOADING/
FORWARD
EJECT/
REVERSE
BRAKE
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