Read Sony XAV-601BT (serv.man3) Service Manual online
XAV-601BT
16
Pin No.
Pin Name
I/O
Description
78 to 83
RAMDAT10 to
RAMDAT12,
RAMDAT5 to
RAMDAT5 to
RAMDAT3
I/O
Two-way data bus with the SD-RAM
84
VDDP
-
Power supply terminal (+3.3V)
85
GNDC
-
Ground terminal
86, 87
RAMDAT13,
RAMDAT2
I/O
Two-way data bus with the SD-RAM
88
VDDC
-
Power supply terminal (+1.8V)
89 to 92
RAMDAT14,
RAMDAT1,
RAMDAT15,
RAMDAT2
I/O
Two-way data bus with the SD-RAM
93
VDDP
-
Power supply terminal (+3.3V)
94
CD_DVD#
O
CD/DVD selection signal output terminal “L”: CD, “H”: DVD
95
GNDC
-
Ground terminal
96
DRVSTB
O
Standby signal output to the coil/motor driver
97
SPDIF_OUT
O
S/PDIF signal output terminal Not used
98
ALRCLK
O
L/R sampling clock signal output to the D/A converter and A/D converter
99
ABCLK
O
Bit clock signal output to the D/A converter and A/D converter
100
AMUTE
O
Audio muting on/off control signal output terminal “H”: muting on
101
ML
O
Serial data latch pulse signal output to the D/A converter
102
MC
O
Serial data transfer clock signal output to the D/A converter
103
MD
O
Serial data output to the D/A converter
104
AIN
I
Digital audio signal input from the A/D converter
105
VDDAPWM
-
Power supply terminal (+3.3V)
106
OP_GAIN
O
Gain control signal output terminal Not used
107
CP_DATA_IN
I
Serial data input terminal Not used
108
CP_DATA_OUT
O
Serial data output terminal Not used
109
CP_CLK
O
Serial data transfer clock signal output terminal Not used
110
GNDAPWM
-
Ground terminal
111
HOMESW
I
Limit switch input terminal
112
AOUT2
O
Digital audio signal output to the D/A converter
113
NC
-
Not used
114
AOUT1
O
Digital audio signal output to the D/A converter
115
NC
-
Not used
116
AOUT0
O
Digital audio signal output to the D/A converter
117
GNDC
-
Ground terminal
118
AMCLK
O
Master clock signal output to the D/A converter and A/D converter
119
VDDP
-
Power supply terminal (+3.3V)
120, 121
NC
-
Not used
122
VCLK2
O
Digital video clock signal output terminal Not used
123 to
130
VID7 to VID0
O
Digital video data output terminal Not used
131
FG_IN
I
FG signal input from the coil/motor driver
132, 133
NC
-
Not used
134
IRRCV
-
Not used
135
VDDP
-
Power supply terminal (+3.3V)
136
DUPTD0
O
Main debug UART data output terminal Not used
137
DUPRD0
I
Main debug UART data input terminal Not used
138
DUPTD1
O
Main debug UART data output terminal Not used
139
DUPRD1
I
Main debug UART data input terminal Not used
140
VDDC
-
Power supply terminal (+1.8V)
141
GNDC
-
Ground terminal
142
RESET#
I
Reset signal input from the master controller “L”: reset
143
GNDPLL
-
Ground terminal
144
VDDPLL
-
Power supply terminal (+1.8V)
145
XO
O
System clock signal output terminal (27 MHz)
146
XI
I
System clock signal input terminal (27 MHz)
147
DAC5
O
Analog video signal output terminal Not used
148
GNDDAC_D
-
Ground terminal
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