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MEX-DV160UE/DV1600U/DV1606U
42
MAIN BOARD IC502 R5F3640DDZ96FB (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
NC
O
Not used
2
SIRCS
I
SIRCS signal input from the remote control receiver
3
LCD_SO
O
Serial data output to the liquid crystal display driver
4
LCD_CE
O
Chip enable signal output to the liquid crystal display driver
5
LCD_CLK
O
Serial data transfer clock signal output to the liquid crystal display driver
6
BYTE
-
External data bus width selection signal input terminal Fixed at “L” (16 bit) in this set
7
CNVSS
I
Processor mode selection signal input terminal
“L”: normal operation mode, “H”: fl ash writing mode
“L”: normal operation mode, “H”: fl ash writing mode
8
XCIN
I
Low-speed system clock input terminal (32.768 kHz)
9
XCOUT
O
Low-speed system clock output terminal (32.768 kHz)
10
RESET
I
System reset signal input from the reset signal generator and reset switch “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
11
XOUT
O
High-speed system clock output terminal (6 MHz)
12
VSS
-
Ground terminal
13
XIN
I
High-speed system clock input terminal (6 MHz)
14
VCC1
-
Power supply terminal (+3.3V)
15
NMI
I
Non-maskable interrupt signal input terminal Fixed at “H” in this set
16, 17
NC
O
Not used
18
V_SEL
I
Video selection signal output terminal “L”: AUX video, “H”: disc video
19
VMUTE_F
O
Video muting on/off control signal output to the video amplifi er “L”: muting on
20
FSW_OUT
O
Frequency selection signal output to the switching regulator
21
VOL_ATT
O
Audio muting on/off control signal output to the audio processor “L”: muting on
22
NC
O
Not used
23
A/V_SEL
O
AUX audio/video selection signal output terminal “L”: AUX video, “H”: disc video
24
ZAPPIN
O
ZAPPIN beep sound output to the audio processor
25
STB
O
Standby signal output to the power amplifi er “L”: standby, “H”: power amplifi er on
26
BEEP
O
Beep sound output to the power amplifi er
27
I2CCLK
O
I2C clock signal output to the audio processor, power amplifi er and tuner unit
28
I2CSIO
I/O
I2C data bus with the audio processor, power amplifi er and tuner unit
29
F_TX
O
Serial data output terminal at the fl ash writing mode
30
F_RX
I
Serial data input terminal at the fl ash writing mode
31
SCLK
I
Serial data transfer clock signal input terminal at the fl ash writing mode
32
BUSY
O
Busy signal output terminal at the fl ash writing mode
33, 34
NC
O
Not used
35
DIAG
I
Diagnosis detection signal input from the power amplifi er
36
NC
O
Not used
37
CLK_OUT
O
Clock signal output terminal Not used
38
NC
O
Not used
39
HOLD
-
External data bus terminal Fixed at “L” in this set
40, 41
NC
O
Not used
42
PARKING
I
Side brake (parking brake) position detection signal input terminal “L”: brake on
43
ACCIN
I
Accessory power detection signal input terminal “L”: accessory power on
44
WRI/WR
-
External data bus terminal Fixed at “H” in this set
45
MSTR_TX
O
Serial data output to the DVD processor
46
MSTR_RX
I
Serial data input from the DVD processor
47
A_MUTE
O
Analog muting on/off control signal output terminal Not used
48
M_RTS
I
Request to send signal output to the DVD processor
49
ATT
O
System muting on/off control signal output terminal “H”: muting on
50
NC
O
Not used
51
EXTATT_XEN
O
External output muting on/off control signal output terminal “L”: muting on
52
Z_MUTE
O
Zero data muting on/off control signal input from the D/A converter “H”: muting on
53
SELFSW
I
Self loading position detection switch input terminal
54
INSW
I
Disc insert detection switch input terminal
55
DSW
I
Chucking end detection switch input terminal
56
M_RESET
O
Reset signal output to the DVD processor and fl ash memory “L”: reset
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