MDX-C8970R - Sony Car Audio Service Manual (repair manual). Page 60

60

Pin No.

Pin Name

I/O

Description

69

CD/MD ON

I

CD/MD servo power supply input detect terminal

70

I2C-SDA

I/O

Two-way data bus with the FM/AM PLL (IC151)

71

I2C-SCL

O

Serial clock signal output to the FM/AM PLL (IC151)

72

SHIFT OUT

O

Shift clock control signal output of the power control (IC871)

73

X1A

O

Sub system clock output terminal (32.768 kHz)

74

X0A

I

Sub system clock input terminal (32.768 kHz)

75

NCO

O

Not used (open)

76

KEYACK

I

Input of acknowledge signal for the key entry    Acknowledge signal is input to accept function
and eject keys in the power off status    On at input of “H”

77

BU-IN

I

Battery detect signal input from the SONY bus interface (IC271) and battery detect circuit
“L” is input at low voltage

78

SP LATCH

O

Serial data latch pulse output for spectrum analyzer section to the liquid display drive controller
(IC701)

79

DSP REDY

I

Transfer enable signal output from the liquid crystal display drive controller (IC701)
“L”: transfer prohibition, “H”: transfer permission

80

TEST

I

Setting terminal for the test mode    “L”: test mode, Normally: fixed at “H”

81

EMPH

O

Emphasis control signal output to the MD mechanism controller (IC501)

82

WAKE UP

O

DC/DC converter power supply on/off control signal output terminal   Not used (open)

83

TEL-MUTE

I

Telephone muting signal input terminal    At input of “L”, the signal is attenuated by –20 dB

84

TU-ON

O

Tuner system power supply on/off control signal output    “H”: tuner power on

85

ILL IN

I

Auto dimmer control illumination line detection signal input terminal
“L” is input at dimmer detection

86

HSTX

I

Hardware standby input terminal    “L”: hardware standby mode    Reset signal input in this set

87

MD2

I

Setting terminal for the CPU operational mode (fixed at “L” in this set)

88

MD0

I

Setting terminal for the CPU operational mode (fixed at “H” in this set)

89

MD1

I

Setting terminal for the CPU operational mode (fixed at “H” in this set)

90

RESET

I

System reset signal input from the reset signal generator (IC506) and reset switch (S703)
“L”: reset    “L” is input for several 100 msec after power on, then it changes to “H”

91

VSS

—

Ground terminal

92

X0

I

Main system clock input terminal (3.58 MHz)

93

X1

O

Main system clock output terminal (3.58 MHz)

94

VCC

—

Power supply terminal (+5V)

95

DOOR-IND

O

LED drive signal output of the illumination LED (LED706)   “H”: LED on
“H” is output to turn on LED when front panel is opened

96

DSP ON

O

Power supply on/off control signal output for the CXD2727Q (IC300)    “H”: DSP on

97

NCO

O

Not used (open)

98

AMP STBY

O

Standby on/off control signal output to the power amplifier (IC481)
“L”: standby mode, “H”: amp on

99 to 102

TIR-D0 to

TIR-D3

I/O

Two-way data bus with the MSM6688GS (IC951)

103

TIR-RD

O

Data read strobe signal output to the MSM6688GS (IC951)
“L” is output when data (D0 to D3) are output to the MSM6688GS (IC951)

104

TIR-WR

O

Data write strobe signal output to the MSM6688GS (IC951)
“L” is output when data (D0 to D3) are output to the MSM6688GS (IC951)

105

TIR-CE1

O

106

TIR-CE0

O

Chip enable signal output to the MSM6688GS (IC951)
TIR-WR (pin !‚› or TIR-RD (pin !‚‹ is accepted when CE1 is “L” or CE0 is “H” respectively
TIR-WR (pin !‚› or TIR-RD (pin !‚‹ is not accepted when CE1 is “H” or CE0 is “L” respectively