Read Sony CDX-GT540UI / CDX-GT54UIW Service Manual online
CDX-GT54UIW/GT540UI
CDX-GT54UIW/GT540UI
13
13
4-1. BLOCK DIAGRAM – MAIN Section –
SECTION 4
DIAGRAMS
20
22
22
11
12
28
12
28
8
17
18
18
3
25
7
19
27
13
24
27
13
24
4
AU_LCH
AU_RCH
AU_RCH
TXD(MC-BUS)
RXD(MC-BUS)
WAKE UP
Z_MUTE
CD_ON
CDM_ON
RXD(MC-BUS)
WAKE UP
Z_MUTE
CD_ON
CDM_ON
SYS_RST
EJECT_OK
VBUS_ON
EJECT_OK
VBUS_ON
A_ATT
BU_CHECK
MECHA 8.5V
A+3.3V
BU_+3.3V
DR_+6V
BU_CHECK
MECHA 8.5V
A+3.3V
BU_+3.3V
DR_+6V
R-CH
R-CH
R-CH
R-CH
R-CH
R-CH
BU+3.3V
AUDIO +8.5V
BU_+3.3V
SERVO+3.3V
R-CH
R-CH
7 AUX-L
9 AUX-R
9 AUX-R
MC_RX
59
MC_TX
60
WAKE_UP
58
Z_MUTE
62
CD_ON
27
CDM_ON
28
RESET
54
SYSRST
26
VBUS_ON
BU +3.3V
70
CLK_IN
61
MD2
51
MD0
53
FLASH_EN1
78
VOUT
1
VIN 2
15
D701
4 FMIN1
3 FMIN2
3 FMIN2
3 TU-L
8 AUX GND
ELECTRONIC VOLUME
IC302
J1
(ANTENNA)
PHASE LOCKED LOOP
(PLL)
IC001
L6
FM MIX
L2
CN701
CD
MECHANISM
UNIT
(MG-101Z)
(1/2)
I2C BUS CONTROLLED
POWER AMP/MULTIPLE
VOLTAGE REGULATOR
IC301
SYSTEM CONTROL
IC401 (1/2)
RESET
IC403
CN802
4 TU-R
5 CD-L
6 CD-R
6 CD-R
R-CH (FRONT)
R-CH (REAR)
R-CH (REAR)
BATT
R-CH
8
9
9
18
SCL
19
SDA
14
RSSI
37 VSM
16 XTAL1
15 XTAL2
LOUT
ROUT
J901
L
R
-1
-2
AUX
J301 (1/2)
X1
4MHz
BUS
AUDIO IN
S401
RESET
5
3
3
OUT-FL+
OUT-FL–
OUT-FL–
9
7
7
OUT-RL+
OUT-RL–
OUT-RL–
27
R-CH
ANT-REM
35
VP
BATT
20
VP1
6
VP2
30
AUDIO+B
31
33
33
SERVO+3.3V
MECHA+6V
34
PANEL+B
R-CH (REAR/SUB)
34
32
32
OUT-FR
27
SACLK
28
SADA
29
SAOUT
OUT-RR
R-CH
31
R/S OUT-L
30
R/S OUT-R
13
ZAPPIN1
16
ZAPPIN2
4 SCL
AUDIO +8.5V
SERVO+3.3V
MECHA+6V
PANEL+B
SERVO+3.3V
MECHA+6V
PANEL+B
2 SDA
16 BEEP
22 STB
25 DIAG
22 STB
25 DIAG
7
10
12
11
16
1
9
9
2
4
3
6
37
38
38
SCL
SDA
I2C-SCK
I2C-SIO
I2C-SCK
I2C-SIO
I2C-SCK
I2C-SIO
I2C-SIO
I2C-SCK
I2C-SIO
23
I2C_SCK
72
SACLK
71
SAOUT
38
SAIN
22
I2C_SIO
31
ATT
47
EXTATT_XEN
98
ZAPPIN
97
BEEP
68
AMPSTB
69
DIAG
83
BU_CHECK
12 IN-FL
FL+
FL–
FL–
L
R
RL+
RL–
RL–
FR+
FR–
RR+
RR–
FR–
RR+
RR–
ANT-REM
BATT
ACC
35
OUT-FL
11 IN-RL
33
OUT-RL
MUTE
Q102
MUTE DRIVE
Q303,304
13 RST
12 BUS_IN
11 CLK_IN
10 BU_CHECK
12 BUS_IN
11 CLK_IN
10 BU_CHECK
9 DATA_IN
8 DATA_OUT
8 DATA_OUT
29
ACC_IN
ACC DETECT
Q805
+3.3V REG
IC402
MUTE
Q103
29
AMP-REM
5
AMP-REM
1 AMRFIN
REAR/SUB
BUS INTERFACE
IC801
D306
D308
D309
FU601
25
BUS_ON
37
BU+B
B.U+5V
FRONT
R-CH
L
J301 (2/2)
R
-3
-4
-5
-6
AUDIO
OUT
MUTE
Q104
BU+3.3V
BATT
2 BUS-R
1 BUS-L
3
BATT
CLK
RST
DATA I/O
BUS_ON
5
6
6
8
4
2
3
3
1
4
1
2
5
4
BATT
CN801
(BUS CONTROL IN)
TH801
7
6
BACK-UP
CHECK
Q802,D806,807
MECHA +6V
3.3V
6
3
FLASH_W
UART_CLK
7
CLK IN
2
RESET
RX
4
1
5
TX
CN401
FLASH
PROGRAMMING
BU +3.3V
B.U +5V
20
UNISCK
19
UNISO
18
UNISI
CD MUTE
Q305
FLASH
PROGRAMMING
BUFFER
Q401,402,701
6LJQDO3DWK
5&+LVRPLWWHGGXHWRVDPHDV/&+
: AM
: CD
: FM
: BUS AUDIO
: AUX
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