Read Sony CDX-DAB500A / CDX-DAB500U Service Manual online
CDX-DAB500A/DAB500U
39
Pin No.
Pin Name
I/O
Description
68
XVDD3
-
Power supply terminal (+3.3V)
69
ADVDD3
-
Power supply terminal (+3.3V)
70
ADIN1 (IN_L-CH)
I
L-ch audio signal input from the electrical volume
71
ADVREFL
O
Reference voltage output terminal
72
ADVCM
O
Reference voltage output terminal
73
ADVREFH
O
Reference voltage output terminal
74
ADIN2 (IN_R-CH)
I
R-ch audio signal input from the electrical volume
75
ADVSS3
-
Ground terminal
76
MS
I
I/F mode selection signal input terminal Fixed at “L” in this unit
77, 78
CD_BUS0,
CD_BUS1
I/O
Two-way serial data bus terminal Not used
79
So
O
Serial data output to the CD drive/USB controller
80
Si
I
Serial data input from the CD drive/USB controller
81
SCL
I
Serial data transfer clock signal input from the CD drive/USB controller
82
/CCE
I
Chip enable signal input from the CD drive/USB controller
83
VDD3-2
-
Power supply terminal (+3.3V)
84
VSS-3
-
Ground terminal
85
/RST
I
Reset signal input from the system controller “L”: reset
86
VDD1-4
-
Power supply terminal (+1.5V)
87
DEC_REQ
O
Interrupt signal output to the CD drive/USB controller
88
BSIF_REQ
O
Request signal output to the CD drive/USB controller
89
BSIF_GATE
I
Gate signal input from the CD drive/USB controller
90
BSIF_DATA
I
Digital audio data input from the CD drive/USB controller
91
BSIF_BCK
I
Bit clock signal input from the CD drive/USB controller
92
BSIF_LRCK
I
L/R sampling clock signal input from the CD drive/USB controller
93
DEC_XMUTE
I
Muting on/off control signal input from the CD drive/USB controller “L”: muting on
94
ZDET
O
Zero detection signal output to the CD drive/USB controller
95
SP_DATA
O
Spectrum analyzer data output to the system controller
96
SP_CLK
I
Spectrum analyzer data transfer clock signal input from the system controller
97
TEST
I
Setting terminal for test mode Normally fi xed at “L”
98
PDO
O
Phase error margin signal between EFM signal and PLCK signal output terminal
99
TMAX
O
TMAX detection result output terminal
100
LPFN
I
Inverted signal input from the operation amplifi er for PLL loop fi lter
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