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CDX-C4840R/C4850R
4-2. BLOCK DIAGRAM — CD SECTION —
35
31
36
39
38
PD1
RF
CLKO
XLTO
DATO
SE IN
FOK
CN IN
RF 0
21
PCMD
22
BCK
20
LRCK
34
XTAI
27
GFS
19
CLK
20
XLT
21
DATA
24
SENS
25
FOK
23
14
DIN
59
57
56
54
1
55
C. OUT
37
FE BIAS
22
50
XRST
16
SLO
6
FEO
13
TAO
PD2
E
F
1 FEO
2 FEI
34 PD
33 LD
XRST
MDP
RF AMP, SERVO CONTROL
IC2
OPTICAL PICK-UP
KSS-521A
DIGITAL SIGNAL PROESSOR
IC1
D/A CONVERTER
IC702
FOCUS
GAIN
RV4
FOCUS
BIAS
RV1
LD POWER
CONTROL
Q1, 2
PD
LD
FOCUS/TRACKING COIL DRIVE,
MOTOR DRIVE
IC3
CH2 IN
LEVEL
SHIFT
22
16
15
TRACKING
CH1 IN
LEVEL
SHIFT
19
18
17
FOCUS
M902
(SLED)
CH2+
CH2–
CH1+
CH1–
CH3 IN
LEVEL
SHIFT
24
13
14
CH3+
CH3–
M
M901
(SPINDLE)
CH4 IN
LEVEL
SHIFT
2
CTL2 5
12
CH4+
M
M903
(LOADING)
FWD
LEVEL
SHIFT
6
REV
7
10
CH5+
M
49
SENS
46
SQSO
47
SQCK
51
DATA
52
XLAT
53
CLOK
43
SCOR
45
EXCK
41
WFCK
44
SBSO
5
BCKIN
6
LRCIN
4
CLKO
19
XTI
1
XTO
20
RSTB
15
12
V OUTL
9
V OUTR
17
MC/DM1
X700
16.9344MHz
3
1
2
4
3
11
12
13
6
SELECT
SWITCH
Q3-6
SCOR
EXCK
SBSO
WFCK
TXT ON
SCOR
CLOK25
XLAT25
DATA25
SQ CKO
SQ SI
CD SENS
GFS
XRST
TXT CKO
TXT SI
DQSY
C IN
FOK
LD ON
L SW
IN SW
D SW
SELF SW
XMODE
SCLK
SRDT
DQSY
CD TEXT
IC703
SW3
(LIMIT)
SW1
(DISC IN)
SW4
(DOWN)
SW2
(SELF)
23
2
1
114
115
116
117
118
120
27
25
77
57
75
28
3
4
19
17
78
6
5
DEEMPH
R-CH
30
SYSTEM CONTROL
IC801 (1/3)
CD L-CH
TUNER
SECTION
A
I-V
AMP
04
• Signal path
: CD
(Page 27)
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