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STBY
OUT2-
CD
OUT2+
OUT1-
OUT1+
SVR
IN1
IN2
S_GND
IN4
IN3
AC_GND
OUT3+
OUT3-
OUT4+
CK
OUT4-
DATA
TDA7563
To be discontinued. Use eldic:i27p2034.1
TAB
PW_GND
VCC
PW_GND
PW_GND
VCC
PW_GND
TAB
5V_SW
5V_SW
OF
SHEET
NONE
160
150
140
6
5
2
REF
MILLIMETERS
NO.
APP
CK
MAN
REVISIONS
LET
DATE
CG
PLANT CODE:
DATE
UNLESS OTHERWISE SPECIFIED:
NO.
NAME
MATERIAL
DATE
90
80
70
60
130
120
110
100
50
40
30
20
METRIC
ABOVE SCALE FOR REFERENCE ONLY
SCALE
APPROVED
CHECKED
COMPUTER
*
TO HELP SAFEGUARD HEALTH, SAFETY AND THE ENVIRONMENT
PART MUST COMPLY WITH SPECIFICATION WSS-M99P9999-A1
3
ENGLISH
1
4
ORIGINAL WHEN RED
CG COLUMN = GRAPHIC DATA LEVEL
MANUAL
APP
DIMENSIONS ARE IN
3RD ANGLE PROJECTION
STAMPED DIM. +/-
INCHES
MACHINED DIM. +/-
ANGULAR DIM. +/-
DRAWN BY
DO NOT SCALE
SIZE
SKETCH - WIRING DIAGRAM
"D"
POWERVIEW
Visteon
PRODUCT ENGINEERING
Changed C820,1,2,3 to
Place close to IC800
now 1C1F-18B908-AA
L800 was NL501520F10001
PE
170701
C829 was SMD now radial
0603 to 100mW 0805
Changed R834 from 63mw
PE
160701
(i.e. rear seat entertainment)
for all applications
as differential pairs (ex. RR+ and RR-)
Audio Amplifier outputs must be used
and RF=CH2
For example the RR=CH1
left side.
used for a right or
Each pair must be
CH1 and CH2
used in pairs
outputs must be
1.0Vrms minimum required from DSPchipto achieve rated power.
Set resistor divider for maximum load to reduce noise.
Maximum load = 2.0K Ohms
100KHz < Roll Off < 210KHz
FROM INPUT/OUTPUT LINES.
KEEP SDL/SDA AWAY
(from micro)
Parallel to DSP_RET
AMP_S_GND trace_width =125M
A+ trace_width =0.5 inch
CONNECT AMP_GND AND
AMP_S_GND AT C810
Run LF_DSP & LR_DSP INPUTS
Parallel to DSP_RET
(rear conn)
(from micro)
AMP_GND trace_width =0.5 inch
Filter for DSP Chip (SAA7709)
Place filter as close as possible to DSP chip.
lines close in parallel.
NOTE:Run AMP_IN and AMP GND
TRACE WIDTH= 75M
TRACE WIDTH= 75M
TRACE WIDTH= 75M
TRACE WIDTH= 75M
TRACE WIDTH= 75M
TRACE WIDTH= 75M
TRACE WIDTH= 75M
TRACE WIDTH= 75M
pair right and left channels
Audio Amplifier IC
CH3 and CH4.
so now=carry over part
Run RF_DSP & RR_DSP INPUTS
PV
230702
1kOhm 1% 100mW 0805
Changed R820,1,2,3 to
1nF 50V 0805
SA
LOCATE C810 CLOSE TO IC
LOCATE C809 & C812 NEXT
TO IC800 SUPPLY PINS
300702
Add C812.
Place C829 very close to IC800
using direct track routes.
22
12
FFPR
AUDIO POWER AMP
MILAN/PAUL
091202
JPULIS/POWERVIEW/LUX_PLATFORM/PLATFORM/AUDIOAMP.1
PWB 11856
VS-3M5F-3458-AD
VS-3M5F-3458-AD
KARL WESTHEAD
R825
1%
10K
R824
1%
10K
R827
1%
10K
10K
1%
1%
R826
R842
5%
10K
10K
5%
5%
R802
R841
5%
10K
10K
5%
5%
R844
10K
5%
5%
R843
1K
1%
R820
R821
1%
1K
1K
1%
R823
1K
1%
R822
C821
10%
1N
C803
20%
1U
1U
20%
C802
C808
20%
1U
C801
20%
1U
1U
20%
C800
L800
500U
FAKRA_GND
LF-
LF+
LR-
LR+
RF-
RR+
RR-
RF+
RR_DSP
LR_DSP
RF_DSP
LF_DSP
3.9N
10%
10%
C824
R835
249
1%
C812
10%
50V
100N
C809
10%
50V
100N
CLPDET
4.7M
20%
20%
C810
220
5%
R807
220
5%
R806
1N
10%
10%
C823
C822
10%
1N
C820
10%
1N
0
R834
SCL
SDA
AMP_MUTE
GNDI
TP805
TP800
R800
5%
10K
1K
5%
R801
8.5_SW
R837
5%
3.3K
TP804
TP807
TP812
TP813
TP814
C829
20%
10U
TP801
TP828
TP827
TP825
TP817
TP824
TP822
TP821
TP820
TP819
TP818
D800
C811
NPO
5%
10N
TP816
TP815
TP809
TP811
TP810
Q800
Q801
Q802
IC800
R805
5%
10K
R836
1%
47K
R803
1%
47K
R804
1%
47K
R838
5%
3.3K
AMP_EN
20M
200M
A+_AMPLIFIER
BATT
DSP_RET
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
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