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TA-SA500WR/SA600WR/SA700WR
21
Pin No.
Pin Name
I/O
Description
1 to 5
NO_USE
-
Not used
6
BYTE
I
External data bus width selection signal input terminal
7
CNVss
I
Processor mode selection signal input terminal
8, 9
NO_USE
-
Not used
10
RESET
I
System reset signal input from the reset switch “L”: reset
11
Xout
O
System clock output terminal (8MHz)
12
Vss
-
Ground terminal
13
Xin
I
System clock input terminal (8MHz)
14
Vcc1
I
Power supply terminal (+3.3V)
15
NMI
I
For CPU rewrite mode
16, 17
NO_USE
-
Not used
18
AC_CUT
I
AC cut detection signal input terminal “L”: AC cut
19
LED_POWER
O
Speaker LED driver power control
20
LED_SCL
I/O
Two-way I2C clock bus with speaker LED driver
21
NO_USE
-
Not used
22
LED_SDA
I/O
Two-way I2C data bus with speaker LED driver
23
LED_RESET
O
Speaker LED driver reset
24
KEY_PAIRING
I
SECURE LINK key input terminal
25
LED_GREEN
O
LED drive signal output terminal for LINK/STANDBY indicator (green) indicator “H”: LED on
26
LED_RED
O
LED drive signal output terminal for LINK/STANDBY indicator (red) indicator “H”: LED on
27, 28
NO_USE
-
Not used
29
TxD1
O
Transmit data output terminal
30
RxD1
I
Receive data inout terminal
31
ON CHIP DEBUG /
CLK1
I
On chip debuger / fl ash write CLK1
32
NO USE / RTS1
O
Not used / fl ash write RTS1
33
S-AIR_DATA
I/O
Two-way I2C data bus with the S-AIR wireless transceiver
34
S-AIR_CLK
I/O
Two-way I2C clock bus with the S-AIR wireless transceiver
35
S-AIR_RESET
O
S-AIR reset signal output to the wireless transceiver “L”: reset
36
NO_USE
-
Not used
37
S-AIR_INT
I
S-AIR interrupt
38
NO_USE
-
Not used
39
EPM
O
EPM signal output terminal
40
P_CONT2 (S-Master)
O
Power on/off control signal output terminal “H”: on
41
P_CONT1 (S-AIR)
O
Power on/off control signal output terminal “H”: on
42
P_CONT_PVDD
O
Power on/off control signal output terminal “H”: on
43
NO_USE
-
Not used
44
CE
I
Chip enable signal input terminal
45 to 59
NO_USE
-
Not used
60
VCC2
-
Power supply terminal (+3.3V)
61
NO_USE
-
Not used
62
VSS
-
Ground terminal
63 to 68
NO_USE
-
Not used
69
PVDD_SD_EN
O
PVDD/Shutdown signal output terminal
70, 71
NO_USE
-
Not used
72
DRIVE_SD
I
Shutdown signal input from the DAMP processor.
73, 74
NO_USE
-
Not used
75
TAS5538_SDA
I/O
Two-way I2C data bus with the DAMP processor
76
TAS5538_SCL
I/O
Two-way I2C clock bus with the DAMP processor
77
TAS5538_XRST
O
Reset signal output to the DAMP processor “L”: reset
78
TAS5538_XPDN
O
Power down signal output to the DAMP processor “L”: power down
79
STA516_XPDN
O
Power down signal output to the power amplifi er “L”: power down
80
STA516_TH_WARN
I
Thermal warning detection signal input from the power amplifi er “L”: thermal warning
81
DC_DET
I
Speaker DC detection signal input terminal
• IC Pin Function Description
WLK6-MAIN BOARD (1/3) IC201 R5F36506CDFB#30 (SYSTEM CONTROLLER)
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