Read Sony STR-LV700R Service Manual online
16
STR-LV700R
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pin Name
MD2
RDS INT
RDS DATA
SIRCS
DIAG
POWER KEY
NOT IN USE
NOT IN USE
SCDT
SHIFT
DIN
CLK
FL_STB
NOT IN USE (FAN_ON)
NOT IN USE (FAN_CLK)
VOL(B)
VOL(A)
TC74153H B
TC74153H A
NJU4066
TC4052A
TC4052B
TUNED
STEREO
MUTE
DO
RSTX
SLATCH
X1A
X0A
VSS
XO
XI
VCC3
RST (INIT)
NSMUTE
NC
NC
LAT3 (SL/SR)
LAT2 (C/SW)
LAT1 (L/R)
EN
XMODE
CKSEL1
CLK
CE
DI
DO
ERROR
XSTATE
I/O
I
I
I
I
I
I
I
I
O
O
O
O
O
I
I
I
I
O
O
O
O
O
I
I
O
I
I
O
—
—
—
O
I
—
O
O
I
I
O
O
O
O
O
O
O
O
O
I
I
I
Description
Flash programming MD2 input
RDS clock input from tuner
RDS data input from tuner
Data input from the remote control receiver
Protect signal input from CXD9750
Power swich detection signal input
Not used (pull down)
Not used (pull down)
Serial control data output to CXD9743N
Shift clock output to CXD9743N
Serial data output to
µ
PD16315
Clock signal output to
µ
PD16315
STB signal output to
µ
PD16315
Not used (pull down)
Not used (pull down)
Volume signal input from the rotary encoder
Volume signal input from the rotary encoder
IC105 control (Digital input select switch)
IC105 control (Digital input select switch)
IC106 control (Analog input select switch)
IC108 control (Analog input select switch)
IC108 control (Analog input select switch)
Tuning a frequency detection signal input from the tuner
STEREO tuning signal input from the tuner
Muting control signal output to the tuner
Data input from the tuner
System reset signal input
Serial control latch signal output to the tuner
Not used (open)
Not used (connected to ground)
Ground
Clock output (16MHz)
Clock input (16MHz)
Power supply (+3.3V (STBY))
Initialize signal output to CXD9743N
Mute signal output to CXD9743N
Not used (pull down)
Not used (pull down)
Data latch signal output CXD9743N (SL/SR)
Data latch signal output CXD9743N (C/SW)
Data latch signal output CXD9743N (L/R)
Enable signal output CXD9750
Reset signal output to LC89056W
Clock select signal output to LC89056W
Clock signal output to LC89056W
Chip enable signal output to LC89056W
Write data output to LC89056W
Read data input from LC89056W
PLL lock error, data error flag input from LC89056W
Source clock selection monitor input from LC89056W
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