SRS-GD50IP - Sony Audio Service Manual (repair manual). Page 22

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SRS-GD50iP
22
Pin No.
Pin Name
I/O
Description
1 to 3
NO USE
O
Not used
4
SIRCS_IN
I
SIRCS signal input from the remote control receiver
5
P_CONT
O
Power supply on/off control signal output terminal    "H": power on
6
ASEL0
O
Audio input selection signal output terminal    “L”: iPod or USB, “H”: LINE IN or USB
7
ASEL1
O
Audio input selection signal output terminal    “L”: iPod or LINE IN, “H”: USB
8
BYTE
I
External data bus width selection signal input terminal
9
CNVss
I
Change processor mode setting signal input terminal
10
HP_DET
I
Headphone connection detection signal input terminal    “H”: headphone is connected
11
HP_MUTE
O
Headphone muting on/off control signal output terminal    “L”: muting on
12
RESET
I
System reset signal input from the reset signal generator    “L”: reset    
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
13
Xout
O
System clock output terminal (5 MHz)
14
Vss
-
Ground terminal
15
Xin
I
System clock input terminal (5 MHz)
16
Vcc1
-
Power supply terminal (+3.3V)
17
NMI
I
Not used
18
DAMP_RESET
O
Reset signal output to the digital power amplifi er1    “L”: reset
19
DAMP_PDN
O
Power down signal output to the digital power amplifi er1    “L”: power down
20
AC-CUT
I
AC cut detection signal input terminal    “L”: AC cut 
21
DAMP_MUTE
O
Muting on/off control signal output to the digital power amplifi er1    “L”: muting on
22
DAMP_SCL
O
Serial data transfer clock signal output to the digital power amplifi er1
23
DAMP_VALID
I
Valid signal input from the digital power amplifi er1    “H”: valid
24
DAMP_SDA
O
Serial data output to the digital power amplifi er1
25
DAMP_THM
I
Thermal warming signal input from the digital power amplifi er2    “H”: OK
26
DC_DET
O
Speaker DC detection signal input terminal     “L”: DC detect
27
IPOD_VBUS
O
VBUS power supply on/off control signal output terminal    “H”: power on
28
IPOD_CP_RESET
O
Reset signal output to the EEPROM    “L”: reset
29
IPOD_CP_CLK
I/O
Two-way I2C clock bus with the EEPROM
30
IPOD_CP_DATA
I/O
Two-way I2C data bus with the EEPROM
31
UART_TXD1
O
Transmit data output terminal
32
UART_RXD1
I
Receive data input terminal
33
PC_VBUS
O
Not used
34
IPOD_ACCDET
O
Accessory detection signal output to the iPod connector
35
IPOD_TX
O
Serial data output to the iPod connector
36
IPOD_RX
O
Serial data input from the iPod connector
37
IPOD_DET
I
iPod connection detection signal input terminal    “L”: iPod is connected
38
IPOD_ACCID
O
Accessory indicator signal output to the iPod connector
39
IPOD_ACCP
I
Wake-up signal input from the iPod connector
40
PC_CONNECT
O
USB data from iPod connector on/off selection signal output terminal    “H”: USB data on
41
NO USE
O
Not used
42
LED_PC_CONNECT
O
VBUS detection signal output to the USB controller and D/A converter
43 to 45
NO USE
O
Not used
46
NO USE
I
Not used
47
I2C_DATA
O
Not used
48
I2C_CLK
O
Not used
49
KEY_PC_CONNECT
I
SYNC on/off switch input terminal    “H”: SYNC on
50 to 61
LED_VOL_23 to 
LED_VOL_12
O
LED drive signal output terminal for volume level indicator    “H”: LED on
62
Vcc
-
Power supply terminal (+3.3V)
63
NO USE
O
Not used
64
Vss
-
Ground terminal
65, 66
NO USE
O
Not used
67
KEY_ECO
I
Not used
68, 69
NO USE
O
Not used
70
EEPROM_SDA
I/O
Two-way I2C data bus with the EEPROM
71
EEPROM_SCL
I/O
Two-way I2C clock bus with the EEPROM
72
LED_STANDBY
O
LED drive signal output terminal for STANDBY indicator    “H”: LED on
73
KEY_POWER
I
POWER key input terminal
74
KEY_VOL_A
I
Jog dial pulse input from the rotary encoder (A phase input) (for VOLUME)
MAIN  BOARD  IC501  R5F3640DDA04FAR-128 (SYSTEM  CONTROLLER)
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