Read Sony SRS-BTM30 Service Manual online
17
SRS-BTM30
• IC Block Diagrams
– AMP Board –
IC101 SM6451BT-G-E2
Attenuation Control
ADRS2
RSTN
ADRS1
VRR
AVSS
RIN
ROUT
DVSS
MLEN
MCK
MDT
LOUT
AVDD
LIN
1/2 VDD
1/2 VDD
VRL
DVDD
Attenuation Decoder
Interface Control
Chip
Address
Decoder
Decoder
Reference
Voltage
Circuits
Circuits
Attenuation Control
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
IC301, IC311, IC401, IC411 TPA2010D1YZFR
_
+
_
+
_
+
_
+
150 k
150 k
_
+
_
+
Deglitch
Logic
Deglitch
Logic
Gate
Drive
Gate
Drive
OC
Detect
Startup
Protection
Logic
Ramp
Generator
Generator
Biases
and
References
TTL
Input
Buffer
SD
*Gain = 2 V/V
300 k
Notes:
* Total gain =
150 k
R I
2 x
150 k
RI
*Gain =
IN–
IN+
VDD
PVDD
VO+
VO–
GND
GND
SHUTDOWN
1
2
3
4
5
6
7
8
9
Click on the first or last page to see other SRS-BTM30 service manuals if exist.