Read Sony NW-MS7 Service Manual online
1
5
2
3
4
VSS
VIN
CE
V OUT
NC
CURRENT
LIMIT
OUTPUT
CONTROL
VOLTAGE
REFERENCE
3
DI
XCS
XSCK
4
DO
1
2
7
6
5
8
VREF
ADD
BUFFERS
DATA
REGISTER
16
16
R/W AMPS
&
AUTO ERASE
EEPROM
16384BIT
1024 X 16
GND
RESET
VCC
RDY
INSTRUCTION
REGISTER
DECODER
VPP SW
INSTRUCTION
DECODE
CONTROL
&
CLOCK
GENERATION
VPP
GENERATOR
– 41 –
– 42 –
IC703 CXD1858GA
IC711 – 713
TC7SH08FU-TE85R
TC7SH08FU-TE85R
IC704 M66290FP
4-12. IC BLOCK DIAGRAMS
IC710 S-81230SGUP-DQB-T1
IC706 S-3511AE-FS
IC503 MM1438BWLE
IC502, 707 XC62GR3312MR
IC714 PST3427UL
IC705 AK6417AM-E2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
100
MICRO-COMPUTER
INTERFACE
DSP CORE
CLOCK GENERATOR
&
RESET CIRCUIT
ATRAC DATA
INTERFACE
AUDIO
INTERFACE
DATA RAM & ROM
PROGRAM ROM
XIRQ1
VSS
VDD
TEST
DB0
DB1
DB2
DB3
DB4
XIRQ0
XSLEEP
XSTOP
QO
QMON
EXTAL
EXTAL
XTAL
VDD
VSS
XRST
SCLK
VDD
VSS
SWDT
XLAT
ACLK
ACLK
ACDI
VSS
VDD
XABS
C2PO
ACDO
XARQ
ACDI
ACLK
XABS
C2PO
ACDO
XARQ
DODT
AIDT
DIDT
BCK
WDCK
LRCK
EXEC
STRO
PSSL
ATT
VDD
VSS
INSEL
MUTE
REC
EXMEM
ATRAC3
LEVEL3
ACDI
XABS
C2PO
ACDO
XARQ
DODT
AIDT
DIDT
BCK
WDCK
LRCK
EXEC
STRO
PSSL
ATT
INSEL
MUTE
REC
ATRAC3
LEVEL3
MUTE
ATT
REC
ATRAC3
LEVEL3
STRO
EXEC
AIDT
DODT
DIDT
BCK
WDCK
LRCK
PSSL
INSEL
ADR15
ADR14
ADR13
ADR12
ADR11
ADR10
ADR9
VSS
VSS
VDD
VDD
ADR8
ADR7
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
XDRD
XDWR
XIORD
VSS
VDD
XPRD
XPWR
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
VSS
VSS
VDD
VDD
DB11
DB10
DB9
DB8
DB7
DB6
DB5
IN B
IN A
GND
VCC
OUT Y
1
2
3
5
4
1
2
3
4
5
6
7
8
9
10
11
12
13
36
35
34
33
32
31
30
29
28
27
26
25
14 15 16
17 18 19 20 21 22
23 24
USB
TRANSCEIVER
SERIAL
INTERFACE
ENGINE
USB
PERIPHERAL
CIRCUIT
CLOCK
CONTROL
(OSCILLATOR/
PLL)
TCK
TRST
TEST1
TR_ON
VBUS
GND
VCC
D+
TMS
TDI
TDO
GND
XIN
XOUT
VCC
A1
A2
A3
A4
A5
A6
D0
D1
D0
D1
48 47 46 45 44 43 42 41
40 39 38 37
RESET
DREQ
DACK
CS
WR
RD
INT
TEST2
D15
D14
D13
D12
DREQ
DACK
CS
WR
RD
INT
D15
D14
D13
D12
D
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
VCC
GND
DACK
DREQ
CS
WR
RD
INT
DEVICE
CONTROL
UNIT
END POINT
BUFFER
(3k BYTE FIFO)
CPU
REGISTER
1
GND
2
VIN
3
VOUT
REFERENCE
VOLTAGE
4
VSS
3
NC
1 OUT
2 VIN
VREF
2
3
4
1
8
7
6
5
OSCILLATION
CIRCUIT
SHIFT
REGISTER
SERIAL
INTERFACE
FREQUENCY
DIVISION,
TIMING
PRODUCTION
INT
REGISTER
STATUS
REGISTER
COMPARATOR
CLOCK
PRODUCTION
CIRCUIT
CONSTANT
VOLTAGE
CIRCUIT
POWER
SUPPLY
VOLTAGE
DETECTION
CIRCUIT
SEC.
MIN.
HOUR
WEEK
DAY
MONTH
YEAR
XINT
XIN
XOUT
VSS
CS
XSCK
SIO
VDD
1
8
2
3
4
7
6
5
CS
CEL
EXT
VCC
SW1
SW2
LV
GND
LOW
VOLTAGE
DETECTION
CONSTANT
CURRENT
CONTROL
CONTROL
CONSTANT
VOLTAGE
CONTROL
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