Read Sony NW-HD1 (serv.man2) Service Manual online
SERVICE MANUAL
– MAIN Board (Component Side) –
NW-HD1
SUPPLEMENT-1
Subject: Printed Wiring Boards Modification (Suffix-12)
US Model
Canadian Model
AEP Model
UK Model
9-879-079-81
Ver 1.1 2004.09
•
NEW/FORMER TYPE DISCRIMINATION
– HDD Board (Conductor Side) –
Former type : 1-862-778-11
New type
New type
: 1-862-778-12
R9515
C9503
10
501
6
D9501
K
A
S9501
BUILT-IN BATTERY
OFF ON
Former type (Suffix-11)
R9515 is mounted.
C9503
10
501
6
S9501
BUILT-IN BATTERY
OFF ON
New type (Suffix-12)
R9515 is not mounted.
2
NW-HD1
•
Note for Printed Wiring Boards and Schematic Diagrams
•
MAIN and HDD boards are multi-layer printed board.
However, the patterns of intermediate-layer have not been in-
cluded in diagram.
However, the patterns of intermediate-layer have not been in-
cluded in diagram.
Note on Schematic Diagram:
•
All capacitors are in
µ
F unless otherwise noted. (p: pF)
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
•
All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
f
: internal component.
•
C
: panel designation.
•
A
: B+ Line.
•
Power voltage is dc 4.2 V and fed with regulated dc power
supply from CN9501.
supply from CN9501.
•
Voltages and waveforms are dc with respect to ground
under no-signal conditions.
no mark : PLAYBACK
under no-signal conditions.
no mark : PLAYBACK
•
Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
•
Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
Voltage variations may be noted due to normal produc-
tion tolerances.
•
Circled numbers refer to waveforms.
•
Signal path.
F
: AUDIO
Note on Printed Wiring Board:
•
X
: parts extracted from the component side.
•
Y
: parts extracted from the conductor side.
•
f
: internal component.
•
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
Caution:
Pattern face side:
Pattern face side:
Parts on the pattern face side seen from
(Conductor Side)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(Component Side) the parts face are indicated.
surface
Lead layout of conventional IC
CSP (chip size package)
• The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
form that of conventional IC.
form that of conventional IC.
•
Lead Layouts
*
Replacement of IC1003, 1101, 2001, 3001, 7001 and 7002
used in this set requires a special tool.
used in this set requires a special tool.
*
Replacement of IC1003, 1101, 2001, 3001, 7001 and 7002
used in this set requires a special tool.
used in this set requires a special tool.
Note:
The components identi-
fied by mark
The components identi-
fied by mark
0
or dotted
line with mark
0
are criti-
cal for safety.
Replace only with part
number specified.
Replace only with part
number specified.
Note:
Les composants identifiés par
une marque
Les composants identifiés par
une marque
0
sont critiques
pour la sécurité.
Ne les remplacer que par une
pièce por tant le numéro
spécifié.
Ne les remplacer que par une
pièce por tant le numéro
spécifié.
1.
DIAGRAMS
NW-HD1
3
3
NW-HD1
C7012
C7013
C7014
C7015
C7016
C7017
C7018
C7009
C7010
C7006
C7007
C7008
C7001
C7002
C7003
C7004
C7005
FB7001
FB7002
FB7003
R7001
R7002
R7003
R7004
R7008
R7006
R7005
C7011
VDR7001
VDR7002
IC7002
IC7001
R7012
R7011
R7010
R7009
FB7004
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
1k
100k
1k
1k
0
470k
0
100p
EDL1216CASA-10L
-E
CXD1616GH
22
22
470k
470k
U_D
U_A
1.8V
GND
3.3V
1.2V
SLEEP_GOHAN
XEXT_CLK
EXT_CLK
GAND_A
GAND_D
GANDHI_CNT
CDIF_XRDE
RMC_DTCK
USB_CNT
H_A
H_D
HDD_CNT
CDIF_PCMD
CDIF_BCK
CDIF_LRCK
XRESET_LCD
D33_MODE
GAND_A
GAND_D
GANDHI_CNT
U_D
U_A
USB_CNT
XINTREQU
XINTREQH
XOUT
XINTREQG
FS256
XRESET_GOHAN
XURESET
XUSLEEP
XGSEN_PWR_CTL
BACKLIGHT_PWR
UD0
UD1
UD2
UD3
UD4
UD5
UD6
UD7
UA0
UA1
UA2
UA3
UA4
UA5
UA6
UA7
XCS
XCS
XRAS
XRAS
XCAS
XCAS
XWE
XWE
LDQM
LDQM
UDQM
UDQM
SDCLK
SDCLK
SDCKE
SDCKE
BA0
BA1
BA0
BA1
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
X
U
IN
T
R
EQ
X
U
W
A
IT
X
U
W
R
X
U
R
D
H
A
0
H
A
1
H
A
2
H
D
0
H
D
1
H
D
2
H
D
3
H
D
4
H
D
5
H
D
6
H
D
7
H
D
8
H
D
9
H
D
1
0
H
D
1
1
H
D
1
2
H
D
1
3
H
D
1
4
H
D
1
5
X
H
R
E
S
E
T
H
IN
T
R
E
Q
X
H
D
M
A
C
K
X
H
IO
W
X
H
IO
R
X
H
C
S
1
X
H
C
S
0
X
U
CS
0
X
U
C
S
1
H
D
M
A
R
E
Q
X
H
IO
R
D
Y
XEXT_CLK
EXT_CLK
CDIF_XRDE
C
D
IF
_X
R
D
E
CDIF_PCMD
C
D
IF_
P
C
M
D
CDIF_BCK
C
D
IF_
B
C
K
CDIF_LRCK
C
D
IF
_
L
R
C
K
EXT_CLK
XEXT_CLK
SA11
SA12
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
G
A
1
G
A
2
G
A
3
G
A
4
G
A
5
G
A
6
G
A
7
G
A
8
G
A
9
G
A
1
0
G
A
1
1
G
A
1
2
G
A
1
3
G
A
1
4
G
A
1
5
G
A
1
6
G
A
1
7
G
A
1
8
G
A
1
9
G
A
2
0
G
A
2
1
G
A
2
2
G
A
2
3
X
C
S5
X
C
S
6
X
C
S
7
X
R
D
X
W
R
X
L
B
X
U
B
X
W
A
IT
G
D
0
G
D
1
G
D
2
G
D
3
G
D
4
G
D
5
G
D
6
G
D
7
G
D
8
G
D
9
G
D
10
G
D
1
1
G
D
1
2
G
D
1
3
G
D
1
4
G
D
1
5
XINTREQU
XINTREQU
XINTREQH
XINTREQH
XOUT
X
O
U
T
XINTREQG
XINTREQG
FS256
F
S
2
56
XRESET_GOHAN
XRESET_GOHAN
XURESET
X
U
R
E
S
E
T
XUSLEEP
X
U
S
L
E
E
P
X
G
S
E
N
XGSEN
S_GOHAN
S_GOHAN
TEST1
TEST0
TDO
TRST
TCK
TM
S
TDI
SYNCM
ODE
GPIO8
XEL_PW
R_CTL
RESET_LCD
D33_M
ODE
BACKLIT_PW
R
GSEN_PW
R_CTL
HDD_PW
R_CTL
USLEEP
URESET
DTCK
FS256
XRDE
DATA
BCK
LRCK
XHRESET
HINTREQ
HDMARQ
XHDM
ACK
HIORDY
XHIOW
XHIOR
XHCS1
XHCS0
HD15
HD14
HD
13
HD12
HD
11
HD10
HD9
HD8
HD7
HD6
HD5
HD4
HD3
HD2
HD1
H
DO
HA2
HA1
HA0
XUINTREQ
XUW
AIT
XUWR
XURD
XUCS1
XUCS0
UD7
UD6
UD5
UD4
UD3
UD2
UD1
UD0
UA7
UA6
UA5
UA4
UA3
UA2
UA1
UA0
SDCKE
SDCLK
UDQM
LDQM
XSWE
XCAS
XRAS
XSCS
SD15
SD14
SD13
SD12
SD11
SD10
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
BA1
BA0
SA12
SA11
SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
XINTREQU
XINTREQH
TEST2
XICKSTP
NC
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDE18
VDE18
VDE18
VDE18
VDE18
VDE18
VDE18
VDE18
VDE18
VDE18
VDE33
VDE33
VDE33
VDE33
VDE33
VDE33
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
NC
XTAL
EXTAL
CLK2250A
CLK2250X
XOSCSTP
XRESET
EXCLKIN
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
D0
D1
D
2
D3
D4
D
5
D6
D7
D
8
D9
D10
D
11
D12
D13
D14
D15
XCS1
XCS2
XCS3
XRD
XW
R
XW
AIT
NC
N
C
XINTREQG
XUB
XLB
(1/7)
∗
CSP(Chip Size Package)
MULTI INTERFACE
∗
SD-RAM
CSP(Chip Size Package)
1-1. SCHEMATIC DIAGRAM – MAIN Section (1/7) –
(Page 5)
(Page 9)
(Page 9)
(Page 4)
(Page 6)
(Page 7)
NW-HD1
4
4
NW-HD1
1-2. SCHEMATIC DIAGRAM – MAIN Section (2/7) –
FB1
101
C1103
R1103
R1102
C3011
C3009
C3005
C3006
C3017
C3015
C3018
R3023
R3024
R3019
R3020
R3021
R3022
C3013
C3012
C3010
C30
07
C30
08
R3014
R3015
C3001
C3002
R3005
VDR3001
VDR3002
C3003
R3004
C3004
L3001 100
µ
H
100
µ
H
L3002
R3002
R3010
R3006
R3025
IC3001
VDR3004
VDR3003
IC1101
C1101
0.1
100k
0
0.1
0.1
1
0.1
0.1
0.1
0.1
0
0
0
0
0
0
1
0.1
0.1
0.1
0.1
0
0
0.1
1
0
100p
220
0.1
470k
470k
470k
0
CXR710160-211GH
MBM29SL800BE
-90PT
100p
GAND_A
GAND_D
GANDHI_CNT
XRESET_1.8V
RDY_XBUSY
XINT_DENDE
DATA_READY
GDAC_PCMD
GDAC_BCK
CDIF_XRDE
3.3V
1.8V
1.5V
GND
CDIF_LRCK
CDIF_BCK
CDIF_PCMD
XEXT_CLK
EXT_CLK
DENDE_COMAND
XRESET_DENDE
WAKEUP_DENDE
DENDE_SREQ
GDAC_LRCK
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
XCS0
XRE
XUWR
GA1
GA9
GA10
GA11
GA12
GA13
GA14
GA15
GA16
GA17
GA20
DENDE_SS
DENDE_SO
DENDE_SI
DENDE_SCLK
GA18
GA8
GA7
GA6
GA5
GA4
GA3
GA2
GA19
XINT_D
XINT_D
DATA_R
DATA_R
DENDE_S
DENDE_S
WAKEUP_D
WAKEUP_D
XRESET_D
XRESET_D
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
XWE
XRST
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
R/XB
A16
XBYTE
VSS
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
XOE
VSS
XCE
A0
EVA
VDIO0
DVSS0
DVDD0
TEST7
TEST8
DVDD4
VDIOCD0
BCK
LRCK
PCMD
VDIOCD1
PF4/XRDE
PI3/BCKO
P12/LRCKO
PI0/PCMDO
OSSEL
XIN
XTAL
EXTAL
AVSOSC
AVSPLL
AVDPLL
DVSS3
DVDD1
KRB
KDI
KDO
VDIO1
KCS
KCLK
AVDMO
VDIO2
TEST3
TEST2
TEST1
DVDD3
DVSS1
TEST0
TCK
TDI
VDIO3
TMS
TDO
NTRST
NRST
PF0
PF1
PF2
PF3
PC0
VDIOCD2
PC1
PC2
PC3
DVDD2
DVSS2
PE0
PE1
PE2
PE3
TACK(TEST6)
XOUT(TEST5)
TRST(TEST4)
(2/7)
∗
CSP(Chip Size Package)
FLASH MEMORY
(NOT SUPPLIED)
∗
CSP(Chip Size Package)
SUB SYSTEM
CONTROLLER
(Page 3)
(Page 9)
(Page 6)
