Read Sony MDS-JA30ES Service Manual online
— 70 —
Pin No.
I/O
Description
Pin Name
48, 49
50
51
52 to 55
56 to 60
61
62
63
64
65
66
67
68, 69
70 to 74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
A11, A10
VSS
VDD
A03 to A00
A04 to A08
XOE
XCAS
VSS
XCS
A09
XRAS
XWE
D1, D0
D2 to D6
VSS
D7
ERR
EXTC2R
BUSY
EMP
FUL
EQL
MDLK
CPSY
CTMD0
CTMD1
SPO
VSS
MDSY
LRCK
BCK
C2PO
DATA
DIDT
DODT
DIRCPB
MIN
SPOSL
MCK
VSS
O
—
—
O
O
O
O
—
O
O
O
O
I/O
I/O
—
I/O
I/O
I
O
O
O
O
O
O
O
O
O
—
O
I
I
I
I/O
I
O
O
I
I
O
—
Address signal output (Not used)
Ground
Power supply (+5V)
Address signal output
Address signal output
Output enable control signal output
Column address strobe signal output
Ground
Chip select signal output (Not used)
Address signal output
Row address strobe signal output
Read/write control signal output
Data signal input/output
Ground
Data signal input/output (Not used)
Input/output of error (C2PO) data to external RAM (Not used)
External RAM selection input for error data writing (“H”: External RAM) (Fixed at “L”)
RAM access BUSY signal output (Not used)
EMPTY or immediately before FULL of ATRAC data (When DSC=ASC+1: “H”)
(Not used)
FULL or immediately before EMPTY of ATRAC data (When ASC=DSC+1: “H”)
(Not used)
ATRAC data EMPTY (When DSC=ASC: “H”) (Not used)
Indicates recording/playback data main/sub (“H”: Sub, Linking: “L”: Main) (Not used)
Interpolation sync signal output (Not used)
DSC counter mode output (Not used)
System clock (512fs=22.5792 MHz) signal output
Ground
Main data sync detection signal output (Not used)
L/R clock signal input (44.1 kHz)
Bit clock signal input (2.8224 MHz)
C2PO signal input (Shows data error status)
Playback:C2PO (“H”) Digital recording: D In-Vflag Analog recording: “L”
Recording: Recording audio data signal output
Playback: Playback audio data signal input
Input of digital audio input 16-bit data from CXD2535CR
Output of digital audio output 16-bit data to CXD2535CR
Disc drive and EFM encoder/decoder recording/playback mode output (Not used)
External monitor signal input
Pin 87 (SPO) input/output switching input pin (“L”:IN “H”:OUT) (Not used)
(Fixed at “H”)
RAM controller internal master clock output (Not used)
Ground
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