ICF-CD2000, ICF-CD2000S - Sony Audio Service Manual (repair manual). Page 21

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Pin No.

Pin Name

I/O

Description

1

SHOCK

O

C2 flag shock detection once danger signal output to the LC78626KE (IC502)
“L”: shock detection danger

2

PAUSE

O

Pause signal output to the LC78626KE (IC502)    “H”: pause

3

WOK

O

D-RAM writing enable signal output to the LC78626KE (IC502)    “H”: writing enable

4

BUZ

O

Buzzer sound drive signal output terminal

5

CORES

O

External reset signal output to the CD control signal counter (IC404) and LC78626KE (IC502)
“L”: reset

6

LMT

I

Sled limit-in detection switch (S603) input terminal

7

RES

I

System reset signal input from the reset signal generator (IC402)    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

8

XT1/P74

I

Sub system clock input terminal (32.768 kHz)

9

XT2/P75

O

Sub system clock output terminal (32.768 kHz)

10

VSS1

—

Ground terminal

11

CF1

I

Main system clock input terminal (3 MHz)

12

CF2

O

Main system clock output terminal (3 MHz)

13

VDD1

—

Power supply terminal (+2.8V)

14

KEY1

I

Key input terminal (A/D input)
S402, S403, S421, S422, S424 (WORLD/LOCAL, D.S.T. SUMMER T., ESP, CD PLAY 
MODE, CLOCK) keys input

15

KEY2

I

Key input terminal (A/D input)
S711 to S715 (TUNE/SCAN TIME SET – ., ALARM TRACK/STATION, ALARM TIME, 
ALARM MODE, BAND) keys input

16

KEY3

I

Key input terminal (A/D input)
S706 to S710 (STATION zSELECT/zPRESET 1/2/3/4/5) keys input

17

KEY4

I

Key input terminal (A/D input)
S701 to S705 (TUNE/SCAN TIME SET + >, SNOOZE SLEEP OFF/LIGHT, x OFF
ALARM RESET, RADIO SLEEP, CD u ) keys input

18

OPEN

I

CD door open/close detection switch (S423) input terminal

19

AFC

O

AFC control signal output to the CXA1111N (IC1) when FM reception

20

REG

I

Input of monitor signal of constant-voltage power supply generated form CXA1111N (IC1)
(A/D input)

21

BATT

I

Battery voltage detection input terminal

22

EMPN

I

D-RAM low capacity alarm signal input from the LC78626KE (IC502)    “L”: less capacity

23

CNTOK

I

Data connection point detect completion signal input from the LC78626KE (IC502)
“H”: detection completed (D-RAM writing starts)

24

OVR

I

D-RAM writing interruption signal input from the LC78626KE (IC502)
(RZP pulse signal input in case of overflow or shock)

25

DRF

I

DRF (focusing detection) signal input from the LA9251M (IC501)

26

WRQ

I

Subcode Q output standby input from the LC78626KE (IC502)

27

C2F

I

C2 flag signal input from the LC78626KE (IC502) 

28

AC IN

I

Power failure detection input terminal    “L”: power on, “H”: power failure

29

SHIFT

O

Shift clock output of the main system clock (3 MHz)    “H” active

30

BEEP MUTE

O

Beep sound muting on/off control signal output terminal    “L”: muting on

31 to 40

S4 to S13

O

Segment drive signal output to the liquid crystal display (LCD401)

41

VDD3

—

Power supply terminal (+2.8V)

42

VSS3

—

Ground terminal

43 to 60

S14 to S31

O

Segment drive signal output to the liquid crystal display (LCD401)