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2. ADPCM IC164 – System Controller IC722
The audio signal that is amplified and level-adjusted by the microphone amplifier IC161 and AGC IC162, is input to pin-3 [AIN1] of the ADPCM IC164, passes through the
internal operational amplifier and is converted to the digital data by the A/D converter inside IC164 and is compressed to the PCM format. After the digital data is compressed to
the PCM format, it is output from pin-27 [PCMSO] of the ADPCM IC164 in synchronization with the bit clock of pin-29 [BCLK] and the rising-edge of the sync signal input to
pin-28 [SYNC] of the ADPCM IC164. At the same time, the PCM signal is sent to pin-26 [PCMSI] of the ADPCM IC164 where it is converted to the ADPCM data inside IC164
and is output from pin-25 [IS] of IC164 in synchronization with the bit clock of pin-29 [BCLK] and the fall-down edge of the sync signal input to pin-28 [SYNC] of IC164. During
recording, the frequency input to pin-28 [SYNC] of IC164 is 8 kHz in the LP mode and 11 kHz in the SP mode.
The audio signal that is amplified and level-adjusted by the microphone amplifier IC161 and AGC IC162, is input to pin-3 [AIN1] of the ADPCM IC164, passes through the
internal operational amplifier and is converted to the digital data by the A/D converter inside IC164 and is compressed to the PCM format. After the digital data is compressed to
the PCM format, it is output from pin-27 [PCMSO] of the ADPCM IC164 in synchronization with the bit clock of pin-29 [BCLK] and the rising-edge of the sync signal input to
pin-28 [SYNC] of the ADPCM IC164. At the same time, the PCM signal is sent to pin-26 [PCMSI] of the ADPCM IC164 where it is converted to the ADPCM data inside IC164
and is output from pin-25 [IS] of IC164 in synchronization with the bit clock of pin-29 [BCLK] and the fall-down edge of the sync signal input to pin-28 [SYNC] of IC164. During
recording, the frequency input to pin-28 [SYNC] of IC164 is 8 kHz in the LP mode and 11 kHz in the SP mode.
The ADPCM data that is input to pin-21 [DSP RX] of the system controller IC722, is converted to the parallel data together with the watch information from the timer (RTC)
IC721, the alarm data and the priority data that are set by user. The parallel data is output via the bus line sequentially to the 2M-bit S-RAM of IC727 where the parallel data
that is converted to the file format that suits to be recorded in the Memory Stick. The converted data is output from pin-12 [MS DIO] to the controller inside the Memory Stick in
synchronization with the clock at pin-13 [MS CLK] and the bus state signal at pin-11 [MS BS]. The controller inside the Memory Stick records the input data in the internal
FLASH RAM.
IC721, the alarm data and the priority data that are set by user. The parallel data is output via the bus line sequentially to the 2M-bit S-RAM of IC727 where the parallel data
that is converted to the file format that suits to be recorded in the Memory Stick. The converted data is output from pin-12 [MS DIO] to the controller inside the Memory Stick in
synchronization with the clock at pin-13 [MS CLK] and the bus state signal at pin-11 [MS BS]. The controller inside the Memory Stick records the input data in the internal
FLASH RAM.
For the recording monitor using the headphones, the signal that is converted once to the ADPCM data, is returned to the receiver side (ADPCM demodulation and D/A
conversion) of ADPCM IC164 via system controller IC722 and is sent to pin-4 [IN] of the POWER AMP IC168 via sound volume control VR RV161.
3. VOR DETECTOR IC163 – SYSTEM CONTROLLER IC722
The audio signal that has passed through the operational amplifier inside ADPCM IC164, is used as signal to detect the VOR (Voice on recording) operation. This signal is input
to pin-1 [INPUT] of the VOR DETECTOR IC163. When amplitude of the input signal is detected by the internal detection circuit to be higher than a certain signal level, output
signal from pin-6 [OUT PUT1] is set to "L". The "L" output is sent to pin-147 [XVORIN] of the system controller IC722. When the VOR switch S764 is set to the ON position
(pin-171 of the system controller is "L"), the system controller IC722 controls recording of the audio data into the Memory Stick in accordance with presence or absence of the
input signal to pin-147 [XVORIN]. Note that the capacitor C176 that is connected to pin-5 [RECOVERY TIME CAP] of the VOR DETECTOR IC163, is for the delay time setting
to reset the VOR detection circuit.
conversion) of ADPCM IC164 via system controller IC722 and is sent to pin-4 [IN] of the POWER AMP IC168 via sound volume control VR RV161.
3. VOR DETECTOR IC163 – SYSTEM CONTROLLER IC722
The audio signal that has passed through the operational amplifier inside ADPCM IC164, is used as signal to detect the VOR (Voice on recording) operation. This signal is input
to pin-1 [INPUT] of the VOR DETECTOR IC163. When amplitude of the input signal is detected by the internal detection circuit to be higher than a certain signal level, output
signal from pin-6 [OUT PUT1] is set to "L". The "L" output is sent to pin-147 [XVORIN] of the system controller IC722. When the VOR switch S764 is set to the ON position
(pin-171 of the system controller is "L"), the system controller IC722 controls recording of the audio data into the Memory Stick in accordance with presence or absence of the
input signal to pin-147 [XVORIN]. Note that the capacitor C176 that is connected to pin-5 [RECOVERY TIME CAP] of the VOR DETECTOR IC163, is for the delay time setting
to reset the VOR detection circuit.
4
7
3
12
13
68
69
11
21
159
147
77
171
5
6
25
26
28
29
1
3
27
1
4
PCM
COMPRESSION
ON
OFF
IC164 ADPCM
A/D
GSX
C174
IC163 VOR DETECTOR
INPUT
C173
R174
GND
OUTPUT
XVORIN
VORSW
S764
VOR
VOR
C176
RECOVERY
TIME CAP
TIME CAP
PCM SO
PCM SI
IS
DSP RX
SYNC
SYNC
IC169
INVERTER
BCLK
XBCK
IC722
SYSTEM CONTROLLER
MSBS
MSDIO
MSCLK
TXD2
RXD2
DI
DO
MEMORY
STICK
IC723
EEP ROM
IC721
RTC
DATA
Analog audio
input
input
ADPCM
MODULATION
Fig. 3-2 Recording circuit block diagram
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