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SA-WCT100/SS-MCT100
SA-WCT100/SS-MCT100
21
21
5-7. SCHEMATIC DIAGRAM - MAIN Board (3/7) (SA-WCT100) -
• See Page 40 for Waveforms. • See Page 40 for IC Block Diagrams. • See page 50 for IC Pin Function Description.
BOARD
1
(1/7)
MAIN
IC B/D
IC B/D
15
MAIN
(1/7)
BOARD
8
MAIN
(4/7)
BOARD
BOARD
(2/7)
MAIN
2
7
5
6
1.2
1.2
1.2
3.3
1.2
1.2
3.3
3.3
1.2
3.3
3.3
3.3
1.2
3.3
1.2
3.3
0.1
0
0
0
0
1.6
1.6
3.3
1.2
0
3.3
3.4
3.3
3.3
1.2
1.2
0
3.3
3.3
3.3
1.2
1.2
1.2
1.2
1.2
1.2
0.9
1.2
1.2
0
1.7
1.2
3.3
1.2
1.2
3.3
1.2
1.2
1.2
1.2
1.2
1.2
1.2
0
1.2
1.7
3.3
1.2
1.7
1.7
1.7
1.7
1.2
0
0
0
1.2
2.5
1.2
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
1
1.2
2.5
2.5
3.3
3.3
6.3V
1000
C7
10
R36
22
R26
22
R27
22
R28
22
R30
100
R53
100
R54
100
R65
100
R66
100
R67
470
R23
1k
R4
1k
R24
10k
R2
10k
R21
10k
R32
10k
R38
10k
R41
10k
R43
10k
R45
1M
R35
0
R13
0
R16
0
R17
0
R18
0
R20
2k
R14
10k
R15
1
2
3
4
5
SI-3010KM-TL
IC1
VC
VIN
GND
VOUT
ADJ
0.1
C42
0.1
C39
0.1
C2
0.1
C6
0.1
C11
0.1
C23
0.1
C26
0.1
C35
0.1
C30
0.1
C28
0.1
C33
0.1
C29
0.1
C32
0.1
C34
0.1
C40
0.1
C43
0.1
C45
0.1
C46
0.1
C49
0.1
C50
0.1
C52
0.1
C55
0.1
C57
0.1
C59
0.1
C61
0.1
C62
0.1
C63
0.1
C64
0.1
C66
0.1
C67
0.1
C71
0.1
C73
0.1
C74
0.1
C75
0.1
C76
0.1
C77
0.1
C78
0.1
C79
0.01
C25
0.01
C24
10p
C9
10p
C010
MCK
LRCK
DSP_SPICLK
DSP_SPIDS
SW3.3V
DIR_RERR
DIR_NONAU
DSP_RESET
SI_B
DSP_MOSI
BCK
DATA_DIR
DGND
22
R29
EMG_MUTE
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
ADSST-AVR-1115
IC2
VDDINT
CLKCFG0
CLKCFG1
BOOTCFG0
BOOTCFG1
GND
VDDEXT
GND
VDDINT
GND
VDDINT
GND
VDDINT
GND
INT_REQ
DIR_ERR
AD7
GND
VDDINT
GND
VDDEXT
GND
VDDINT
AD6
AD5
AD4
VDDINT
GND
AD3
AD2
VDDEXT
GND
AD1
AD0
WR
∗
VDDINT
VDDINT
GND
RD
∗
ALE
AD15
AD14
AD13
GND
VDDEXT
AD12
VDDINT
GND
AD11
AD10
AD9
AD8
A16
VDDINT
GND
A17
A18
GND
VDDEXT
VDDINT
GND
PF_CE
SPI_MAS
DPSOA
DPSOB
VDDINT
GND
VDDINT
GND
DPSOC
DPSOD
VDDINT
VDDEXT
GND
VDDINT
GND
DPSOE
DPSIA
DPSIB
DPSIC
DPSID
DPSIE
VDDINT
GND
GND
DPDVLRCK
DPDVBCK
DPLRCK
DPLBCK
VDDINT
GND
GND
VDDEXT
DPFSCK
GND
VDDINT
NONAUDIO*
SF_CE*
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDINT
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDEXT
GND
VDDINT
GND
VDDINT
RESET*
SPIDS*
GND
VDDINT
SPICLK
MISO
MOSI
GND
VDDINT
VDDEXT
AVDD
AVSS
GND
CLKOUT
EMU*
TDO
TDI
TRST*
TCK
TMS
GND
CLKIN
XTAL
VDDEXT
AMP_D3CSW
AMP_D1FLFR
DSP_BCK
DSP_LRCK
DGND
MCK
2.6V
16V
100
C80
16V
100
C001
SI_C
SI_D
SI_E
100
R91
1k
R784
0.1
C782
100
R90
8
7
6
5
4
3
2
1
TC7WZ08FK(TE85R)
IC783
1A
1B
2Y
GND
2A
2B
1Y
Vcc
100
R92
RT1P140C-TP-1
Q781
100
R782
5
4
3
2
1
74L
VC1G79GW
-125
IC782
D
CLK
DGND
Q
VCC
0.1
C90
220k
R781
0.22
C783
10
C85
10
C70
10
C19
10
C36
100
R49
100
R25
25MHz
X1
DSP_INT
DSP_MISO
DSP_MOSI
DSP_MISO
DSP_SPICLK
DSP_BCK
AMP_D1FLFR
AMP_D3CSW
DSP_INT
DSP_RESET
DSP_INT
DSP_RESET
DSP_SPIDS
DSP_MISO
DSP_MOSI
AMP_D1FLFR
MCK
MCK
MCK
BCK
LRCK
LRCK
BCK
SI_E
SI_D
SI_C
SI_B
DSP_LRCK
DSP_BCK
DIR_NONAU
SI_E
SI_D
SI_C
SI_B
D
ATA
_D
IR
DIR_RERR
DSP_SPIDS
DSP_LRCK
DSP_SPICLK
DATA_DIR
DIR_RERR
DIR_NONAU
AMP_D3CSW
DSP
IC2
IC782
D FLIP-FLOP
IC783
BUFFER
INVERTER
IC1
+1.2V REGULATOR
(3/7)
MAIN BOARD
B
12
7
A
J
F
E
9
I
10
H
6
G
1
C
15
D
14
3
4
13
11
8
2
5
(Page 19)
(Page 20)
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19)
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