Read Sony HCD-WZ7AV Service Manual online
39
HCD-WZ7AV
5-21. IC Pin Function Description
• IC505 CXD1887R (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, MPEG VIDEO/AUDIO DECODER,
VIDEO SIGNAL ENCODER)(VMP BOARD)
Pin No.
Pin Name
I/O
Description
1
VB
O
Connected to ground via a capacitor
2
IREF
O
D/A converter reference current output
3
VRF
I
D/A converter reference voltage input
4
VG
O
Connected to the analog power supply (+2.5V) via a capacitor
5
XCPSIG
O
Luminance video composite/component signal invert output terminal Not used
6
CPSIG
O
Luminance video composite/component signal output
7
NC
O
Chrominance video composite signal output Not used
8
V AVD2
—
Analog power supply terminal (+2.5V) (for D/A converter)
9
V AVS2
—
Analog ground terminal (for D/A converter)
10
IVD1
—
Power supply terminal (+3.3V) (for I/O)
11
I2C CLK
I/O
Communication data reading clock signal input or transfer clock signal output terminal
Not used
Not used
12
I2C DATA
I/O
Communication data bus terminal Not used
13
GPIO0
I
Serial data input from the system controller
14
GPIO1
O
Serial data output to the system controller
15
GPIO2
O
Serial data transfer clock signal output to the system controller
16
GPIO3
I
Request signal input from the system controller
17
LVD1
—
Digital power supply terminal (+2.5V) (for AV decoder block)
18
GPIO4
I
Acknowledge signal input from the system controller
19
GPIO5
O
Chip select signal output to the system controller
20, 21
GPIO6, GPIO7
I/O
Not used
22
LVS1
—
Digital ground terminal (for AV decoder block)
23
GPIO8
I/O
Not used
24
GPIO9
O
Frequency selection signal output
25
GPIO10
I/O
Not used
26
GPIO11
O
Serial data latch pulse signal output to the digital filter
27
LVD2
—
Digital power supply terminal (+2.5V) (for AV decoder block)
28
GPIO12
O
Control signal output to the D/A converter
29
GPIO13
O
Serial data transfer clock signal output to the digital filter and D/A converter
30
GPIO14
O
Serial data output to the digital filter and D/A converter
31
IVS1
—
Ground terminal (for I/O)
32
LVS2
—
Digital ground terminal (for AV decoder block)
33
IVD2
—
Power supply terminal (+3.3V) (for I/O)
34 to 37
DRADR0 to
DRADR3
O
Address signal output to the D-RAM and program ROM
38
LVD3
—
Digital power supply terminal (+2.5V) (for AV decoder block)
39 to 45
DRADR4 to
DRADR10
O
Address signal output to the D-RAM and program ROM
46
LVS3
—
Digital ground terminal (for AV decoder block)
47
IVS2
—
Ground terminal (for I/O)
48
IVD3
—
Power supply terminal (+3.3V) (for I/O)
49 to 56
DRDAT0 to
DRDAT7
I/O
Two-way data bus with the D-RAM Data input from the program ROM
57
IVS3
—
Ground terminal (for I/O)
58
IVD4
—
Power supply terminal (+3.3V) (for I/O)
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