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52
52
HCD-GX750/RG551/RX550
IC301 TC94A34FG-002 (BD81A BOARD)
5-29. IC BLOCK DIAGRAMS
33
34
35
36
37
38
39
40
41
42
1
8
43
61
62
63
64
60
59
56
52
50
47
46
45
44
48
49
25
26
27
28
29
30
31
32
17
18
19
20
21
22
23
24
9
10
11
2
3
4
5
6
7
58
57
55
53
51
12
13
14
15
16
54
RAS
CAS
OE
WE
PIO7
PIO6
PIO5
PIO4
Bus
Switch
BUCK
CCE
AD12
AD11
Gener
al
In/Output P
or
t
Address Calc.
2sets
Y-
P
ointer
register
C-P
ointer
register
X-P
ointer
register
VDDM
SRMSTB
VDDT
AD10
AD9
ERAM
2k w
ord
CRAM
4k w
ord
CR
OM
4k w
ord
YRAM
4k w
ord
XRAM
4k w
ord
SRAM/
DRAM I/F
SRAM I/F
1Mbit
SRAM
X-Bus
Y
-Bus
AD7
AD6
AD5
AD8
VC0
Timing
Generator
PRAM
Instr
uction
Decoder
Prog
ram
Control
MCU
. I/F
register
XO • X1 • X2
Y0 •
Y1 •
Y2
MX
MY
MZ
MA
C
A0
A1
AX
A
Y
ALU
A2
A3
DIT
round & limit
round & limit
A
udio I/F
LRCKIA
BCKIA
SDI0
LRCKO
BCKO
SDO0
VSS
VDDT
MIACK
MICK
MIDIO
MILP
MICS
STANBY
RESET
VDDP
AD4
AD3
AD2
AD1
AD0
VSS
VDD
CK
O
VDDX
XO
TEST
VCOI
VSSX
XI
MIMD
VSSP
PIO3
PIO2
PIO1
PIO0
VSS
CKI
VDD
TXO
SFSY
SBSY
D
ATA
POM
Sub code
I/F
CDP Cont
I/F
IC251 BA5947FM (BD81A BOARD)
15
16
17
18
19
20
21
22
23
24
25
26
27
36
28
29
30
31
32
33
34
35
1
2
3
4
5
6
7
8
9
10
11
12
13
14
LEVEL
SHIFT
SHIFT
F
R
R
F
R
F
F
19k
6.5k
50k 50k
100k
50k
PIN3
10k
Vref
50k 50k
PIN26
(ch1, 2)
POW
VCC
(ch3, 4)
SW
Pre
Vcc
INTER
FACE
INTER
FACE
INTER
FACE
R
F
50k 50k
POW
VCC
MUTE
Vref
POW
VCC
R
F
10k
CH1PUTF
CH1OUTR
CH2OUTF
CH2OUTR
POWVCC
CNF4
GND
C-M
C-P
VG
CH2RIN
CH2FIN
CH1RIN
CH1FIN
SW
OPIN+
OPIN-
NC
CH4OUTR
CH4OUTF
CH3OUTF
CH3OUTR
POWVCC
MUTE
GND
GND
PREGND
CT
CH3RIN
CH3FIN
CH4IN
CH4CAPA
OUTVREF
DPOUT
TREVCC
NC
D
D
D
D
D
D
D
D
IC701 BA6956AN (DRIVER BOARD)
IC712 BA6956AN (DRIVER BOARD)
IC712 BA6956AN (DRIVER BOARD)
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
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