Read Sony CPF-IX001 / CPF-NW001 / SA-NW001P Service Manual online
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SA-NW001P
SA-NW001P
SECTION 2
DIAGRAMS
Note on Printed Wiring Boards.
•
•
X
: parts extracted from the component side.
•
Y
: parts extracted from the conductor side.
•
a
: Through hole.
•
f
: internal component
•
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
• Note for Printed Wiring Boards and Schematic Diagrams
Note on Schematic Diagrams.
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. (p: pF)
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
f
: internal tolerance.
•
C
: panel designation.
•
A
: B+ Line.
• Voltages are dc with respect to ground under no-signal
conditions.
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Signal path.
F
: AUDIO
Caution:
Pattern face side:
Pattern face side:
Parts on the pattern face side seen from
(Side B)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(Side A)
the parts face are indicated.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
RXP3
RXP2
RXP1
RXP0
RXN
VA
AGND
FILT
RST
RXSEL1
RXSEL0
TXSEL0
TXSEL1
NV/RERR
AUDIO
96kHz
RCBL
U
C
TX
VL
DGND
VD
RMCK
SDOUT
OSCLK
OLRCK
OMCK
4:2
MUX
AES3 RX
&
DECODER
DE–EMPHASIS
FILTER
SERIAL
AUDIO
OUTPUT
S
P
Sampling Rate
Converter
Converter
DF1
DF2
Gain
Control
Filter
&
LOW
CUT
Filter
Serial Control
Liner
Interpolator
∆ ∑
Converter
XVSS
PWM
INIT/MUTE
Clock Generator
Clock Generator
(Secondary Clock System)
1
VSUBC
2
VSSR
VSSL
VSSL
VSSR
3
OUTR2
OUTL2
OUTR1
OUTL1
4
VDDR
DVDD
DVSS
VDDL
5
6
7
8
XOVSS
XOVDD
9
XFSOOUT
10 11
NSPMUTE
12
SOFTMUTE
13
PGMUTE
SCSHIFT
14
SCDT
15
SCLA
TCH
OVF FLAGR
OVF FLAGL
16
SFLAG
INIT
17
MCKSEL
18
LRCK
19
BCK
20
D
ATA
BFVDD
BFVSS
TEST
DVDD
XFSIIN
21
42
43
41 40 39 38 37
XFSOIN
36
XVDD
35
HPVDDL
34
HPOUTL2
33
HPVSSL
32
31
HPVDDR
30
HPOUTR1
HPOUTL1
29
28
HPVSSR
27
26
25
HPOUTR2
24
FSOI
23
FSOCKO
22
44
45
46
47
48
(Primary Clock System)
RESET 4
GND 1
GND 3
PWM BP 2
DREG RTN 5
GVDD 6
M3 7
M1 10
M2 11
DVDD 12
DREG 8
DGND 9
DGND 14
GND 16
GND 18
PWM
RECEIVER
TIMING
CONTROL
&
PROTECTION
SD 13
OTW 15
DIGITAL
REGULATOR
PROTECTION
LOGIC
OT
&
UVP
DVDD DREG
DREG
DGND
PWM AP 17
PWM
RECEIVER
DVDD DREG
DGND
DREG
GVDD
DREG
GATE
DRIVE
GVDD B
35
GVDD B
36
BST B
33
PVDD B
32
PVDD B
31
OUT B
30
OUT B
29
GND
28
GND
34
GATE
DRIVE
OCH
OCL
TIMING
CONTROL
&
PROTECTION
DREG
GATE
DRIVE
GVDD A
20
GVDD A
19
BST A
22
PVDD A
23
PVDD A
24
OUT A
25
OUT A
26
GND
27
GND
21
GATE
DRIVE
OCH
OCL
GVDD
GVDD
4
6
7
LATCH CIRCUIT RESET
COMPARATOR
START–UP CIRCUIT
UVLO
COMPARATOR
OCP THRESHOLD
COMPARATOR
UVLO
COMPARATOR
OVP
COMPARATOR
VUL
VCC (START)/
VCC (STOP)
VCC (STARTUP OFF)/
VCC (STARTUP ON)
START–UP
CIRCUIT
SOFT DRIVE
CIRCUIT
VOVP
THERMAL
SHUTDOWN
CIRCUIT
ZERO CURRENT
DETECTION CIRCUIT
TURN–ON
DEAD TIMER
STANDBY
CIRCUIT
VREF
IF/B
ON WIDTH
TIMER
VTH (OCL)
BURST MODE
OCP THRESHOLD
COMPARATOR
RESTART
TIMER
VTH (BURST LIMIT)
+
–
+
–
+
–
+
–
+
–
+
–
R
S
Q
R
S
Q
GND
1
+
–
3
2
5
Z/C
F/B
SOURCE/OCL
DRAIN
VIN
VCC
Q1
• IC Block Diagrams
IC801 CS8416-CZZR
IC803 CXD9774M
IC901 MR4010-7103
IC802 CXD9788AR
Note:
The components identi-
fied by mark
fied by mark
0
or dot-
ted line with mark
0
are
critical for safety.
Replace only with part
number specified.
Replace only with part
number specified.
Note:
Les composants identifiés
par une marque
par une marque
0
sont cri-
tiques pour la sécurité.
Ne les remplacer que par une
piéce portant le numéro
spécifié.
Ne les remplacer que par une
piéce portant le numéro
spécifié.
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