Read Sony CMT-PX333 / HCD-PX333 Service Manual online
51
51
HCD-PX333
SECTION 6
DIAGRAMS
6-1. BLOCK DIAGRAMS
MD SERVO SECTION
F
C
B
D
A
E
I
J
J
I
B
A
C
D
D
E
F
DETECTOR
1
2
J
ABCD
I
4
5
6
7
A
B
C
D
D
8
9
E
F
LD
PD
LASER DIODE
ILCC
PD
OPTICAL PICK-UP BLOCK
(KMS-262)
AUTOMATIC
POWER
CONTROL
Q121, 122
LASER ON
SWITCH
Q101
OVER WRITE
HEAD DRIVE
IC181, Q181, 182
11
10
APC
PD
LD/PD
AMP
APCREF
I-V
AMP
I-V
AMP
AT
AMP
B.P.F.
29
30
WBL
ADFM
ADIN
32
ADFG
ABCD
AMP
FOCUS
ERROR AMP
TRACKING
ERROR AMP
35
34
26
28
ABCD
FE
TE
SE
V-I
CONVERTER
20
F0CNT
WBL
3T
EQ
SERIAL/
PARALLEL
CONVERTER,
DECODER
COMMAND
17
16
18
SWDT
SCLK
XLAT
RF AMP
B.P.F.
46
RFO
40
RF AGC
& EQ
AGCI
EQ
38
RF
RF AMP,
FOCUS/TRACKING ERROR AMP
IC101
TEMP
48 47
MORFO
MORFI
3T
PEAK &
BOTTOM
WBL
33
AUX
63
37
PEAK
36
BOTM
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC141
6
8
OUT4F
OUT4R
M
M101
(SPINDLE)
27
25
OUT2F
OUT2R
M
M102
(SLED)
21
23
OUT1F
OUT1R
12
10
OUT3F
OUT3R
FCS+
FCS–
TRK+
TRK–
2-AXIS
DEVICE
(TRACKING)
(FOCUS)
3
4
IN4R
IN4F
29
30
IN2F
IN2R
19
18
IN1F
IN1R
14
15
IN3F
IN3R
MOD
SPFD
SPRD
92
91
88
89
86
85
APCREF
SFDR
SRDR
FFDR
FRDR
TFDR
TRDR
16
PSB
PWM GENERATOR
AUTOMATIC
POWER
CONTROL
DIGITAL
SERVO
SIGNAL
PROCESS
75
66
65
67
ANALOG MUX
A/D CONVERTER
AUTO
SEQUENCER
FROM CPU
INTERFACE
DIGITAL SERVO
SIGNAL PROCESSOR
IC151 (2/2)
RECP
AUX1
ABCD
FE
TE
SE
PEAK
BOTM
81
80
82
XLRF
CKRF
DTRF
XLAT
SCLK
SWDT
PLL
FILTER
60
59
62
61
FILI
PCO
CLTV
FILO
100
EFMO
22
ADDT
25
DATAI
15
TX
53
54
57
ASYO
ASYI
RFI
SCTX
HR901
OVER WRITE HEAD
ADIP
DEMODULATOR/
DECODER
78
ADFG
SPINDLE
SERVO
F0CNT
94 93
SPFD
SPRD
SUBCODE
PROCESSOR
SAMPLING
RATE
CONVERTER
DIGITAL
AUDIO
INTERFACE
DIN0
DOUT
DIGITAL SIGNAL PROCESSOR,
EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER
IC151 (1/2)
DADT
INTERNAL BUS
CLOCK
GENERATOR
XBCK
LRCK
FS256
OSCI
OSCO
CPU
INTERFACE
MONITOR
CONTROL
CONTROL
10
XRST
12
DQSY
11
SQSY
14
XINT
9 8
5 6 7
SENS
SRDT
SWDT
SCLK
XLAT
1
2
3
4
MNT0
MNT1
MNT2
MNT3
SHOCK
XBUSY
SWDT
SCLK
XLAT
47
38 42 50
58 56
MNT1 (SHOCK)
MNT2 (XBUSY)
DIG-RST
SQSY
DQSY
LDON
WRPWR
MOD
XINT
SENS
SRDT
12
13
LDIN
LDOUT
5
6
2
10
4
M
IN1
IN2
OUT1 OUT2
VREF
LOADING
MOTOR DRIVE
IC1004
REFERENCE
VOLTAGE SWITCH
Q1001, 1002
M103
(LOADING)
49, 48, 50, 51
2, 3, 24, 25
DQ1 – DQ4
34 – 31, 36 – 40, 35
9 – 12, 15 – 19, 21, 8
A0 – A10
D0 – D3
A00 – A10
43
22
47
4
46
5
44
23
XOE
XWE
XRAS
XCAS
OE
WE
RAS
CAS
D-RAM
IC152
DIN1
MD MECHANISM CONTROLLER
IC1001 (1/2)
74
13
64
14
79
83
12
HF MODULE
16
17
DADTI
DOUT
B
LRCK, BCK
DIN0
C
A
D
27 32 48 40
25
29
OP-LEVEL
133
35
REFLECT
PROTECT
LD-LOW
M+7V
11
EEP-WP
60
SCL
66
SDA
61
30
43
LIMIT-IN
REC-SW
S101
(LIMIT IN)
51
OUT-SW
COMPA-
RATOR
EFM/ACIRC
ENCODER/DECODER
SHOCK PROOF
MEMORY CONTROLLER
ATRAC
ENCODER/DECODER
26
S105
(REC POSITION)
S103
(PACK OUT)
PLAY-SW 49
S104
(PLAY POSITION)
28
21
20
19
29
27
24
XBCKI
23
LRCKI
68
67
S102-1
(REFLECT RATE DETECT)
S102-2
(PROTECT DETECT)
–1
S102
S104
S103
S105
S101
–2
BCK
LRCK
X171
90.3168MHz
EEPROM
IC195
7
6
5
WP
SCL
SDA
COMPARATOR
IC102
HF MODULE
SWITCH
Q131 – 134
ON: When the over write head is
recording position
recording position
ON: When the optical pick-up is
inner position
ON: When the eject slider is
open position
open position
ON: When the eject slider is
playback position
playback position
ON: When the high reflection
rate disc detect
rate disc detect
ON: When the REC-proof claw is
close (un-protect)
close (un-protect)
(Page 52)
(Page 52)
(Page 52)
(Page 52)
• SIGNAL PATH
: MD PLAY
: MD REC
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