CMT-BT60, CMT-BT60B, CMT-BT80W, CMT-BT80WB - Sony Audio Service Manual (repair manual). Page 60

1

AVSS

-

Ground terminal (analog system)

2

VR_PLL

-

External capacitor connection terminal for internal regulator

3

XTALI

I

System clock input terminal (12.288 MHz)

4

XTALO

O

System clock output terminal (12.288 MHz)

5

MCLKI

I

Master clock signal input terminal    Not used

6

MCRCK_DV

I

Internal microprocessor clock divide control signal input terminal    Not used

7

CS0

I

Chip select signal input terminal    Not used

8

GPIO

O

Interrupt signal output to the system controller

9

DVDD

-

Power supply terminal (+3.3V) (digital system)

10

DVSS

-

Ground terminal (digital system)

11

SDIN1

I

Audio data input from the sample rate converter

12, 13

SDIN2, SDIN3

I

Serial data input terminal    Not used

14

SDIN4

I

Muting on/off control signal input from the system controller    “H”: muting on

15

SDA1

I

I2C data input from the system controller

16

SCL1

I

I2C clock signal input from the system controller

17

SDA2

I/O

I2C data bus terminal    Not used

18

SCL2

I/O

I2C clock signal bus terminal    Not used

19

LRCK

I

L/R sampling clock signal input from the sample rate converter

20

SCLKIN

I

Bit clock signal input terminal    Not used

21

MCLKO

O

Master clock signal output to the digital power amplifi er and sample rate converter 
(Except CMT-BT60: Chinese model)
Master clock signal output to the digital power amplifi er, D/A converter and sample rate con-
verter (CMT-BT60: Chinese model)

22

SCLKOUT1

I

Bit clock signal input from the sample rate converter

23

SCLKOUT2

O

Bit clock signal output to the digital power amplifi er (Except CMT-BT60: Chinese model)
Bit clock signal output to the digital power amplifi er and D/A converter 
(CMT-BT60: Chinese model)

24

SDOUT4

O

Audio data output to the D/A converter (CMT-BT60: Chinese model only)

25, 26

SDOUT3, SDOUT2

O

Serial data output terminal    Not used

27

SDOUT1

O

Audio data output to the digital power amplifi er

28

VR_DIG

-

External capacitor connection terminal for internal regulator

29

DVSS

-

Ground terminal (digital system)

30

DVDD

-

Power supply terminal (+3.3V) (digital system)

31

PDN

I

Power down signal input terminal    “L”: power down    Fixed at “H” in this unit

32

RESET

I

Reset signal input from the system controller    “L”: reset

33

RSRV

-

Connected to the ground

34 to 36

PLL0 to PLL2

I

PLL control signal input terminal    Not used

37

RSRV

-

Connected to the ground

38

AVDD

-

Power supply terminal (+3.3V) (analog system)