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CFD-Z500/Z501/Z550
– 17 –
– 18 –
5-3. BLOCK DIAGRAM — CD SECTION —
M
38
33
35
18
11
10
12
13
14
79
23
20
21
22
26
25
24
• Signal path
• R-ch : same as L-ch.
: CD
27
PD1
RF AMP
FE AMP
39
36
37
PD2
LD
PD
E
F
VC
42
41
51
17
18
19
23
13
LD ON
SWITCH
Q701
LASER
DIODE
CONTROL
SERIAL/
PARALLEL
CONVERTER
DECODER
RF O
FOK
C. OUT
SENS1
SENS2
IIL
TTL
DATA
XLT
CLK
XRST
TTL
IIL
TRACKING
PHASE
FOCUS
PHASE
PHASE
COMMAND
6
16
7
57
4
5
6
17
15
21
8
9 62
65
67
TAO
FEO
SLO
RF AMP & SYSTEM SERVO PROCESSOR
IC701
DIGITAL SIGNAL PROCESSOR
IC703
VREF
TRACKING
COIL
DRIVE
26
27
25
7
3
9
FOCUS
COIL
DRIVE
T+
F+
F-
T-
2
1
SLED
MOTOR
DRIVE
12
11
14
SPINDLE
MOTOR
DRIVE
SL+
CNP702
CNP707
CNP701
SP+
SP-
SP0
SL-
TRACKING
COIL
FOCUS
COIL
A
5
7
6
4
12
14
15
13
16
4
3
6
5
2
3
4
1
2
5
3
8
10
C
B
D
E
F
LD
PD
OPTICAL PICK-UP
BLOCK
(KSS-213C)
TIN
FIN
MUTE
SLIN
SPIN
15
16
16
SPIN
VREF
VREF
VREF
VREF
-
+
+
OPTICAL PICK-UP
DRIVE
IC702
M702
(SLED)
M
M701
(SPINDLE)
9
C-RST
6
C-SEN2
5
C-SEN1
8
C-SQSO
7
C-SQCK
1
C-SOR/R-CNT
10
C-CLK
4
C-MUT
11
C-XLAT
12
C-DATA
RF
FOK
CNIN
SEIN
DATO
XLTO
CLKO
XRST
MDP
SPOA
XLON
SENS
SQSO
SQCK
SCOR
DATA
XLAT
CLOK
SYSM
XTAI
XTAO
SERVO
AUTO
SEQ.
EFM DEMODULATOR
SERIAL
INTERFACE
D/A
INTERFACE
SUB CODE
PROCESSOR
CPU INTERFACE
DIGITAL
CLV
S701
(LIMIT)
SYSTEM CONTROL
IC801 (1/2)
70
•
71
X701
16.9344MHz
DIGITAL
FILTER
&
D/A
CONVERTER
AOUT1
LOUT1
76
74
AOUT2
LOUT2
CD L-CH
R-CH
CNB704
5
A
MAIN
SECTION
PWM
AMP
PWM
AMP
CD
04
4
CNP801
CNP703
7
8 5 6
10
1
2 3 9
7
4
3 6 5
1
10 9 8 2
CD BOARD
CONTROL BOARD (1/2)
CD MOTOR BOARD
(Page 19)
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