CFD-E55 - Sony Audio Service Manual (repair manual). Page 38

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IC  PIN  FUNCTION  DESCRIPTION
 LCD BOARD  IC501  CXP83620-011Q (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
C-SCOR
I
Subcode sync (S0+S1) detection signal input from the CXD2589Q (IC703)
2
RMC
I
Sircs remote control signal input terminal    Not used (fixed at “L”)
3
BUZZER
O
Buzzer sound signal output terminal
4
LED
O
LED drive signal output of the ALARM indicator (D602)    “L”: LED on
5
C-SENS
I
Internal status signal (sense signal) input from the CXD2589Q (IC703)
6
C-SENS2
I
Internal status signal (sense signal) input from the CXA1992BR (IC701)
7
C-SQCK
O
Subcode Q data reading clock signal output to the CXD2589Q (IC703)
8
C-SQSO
I
Subcode Q data input from the CXD2589Q (IC703)
9
C-RST
O
System reset signal output to the CXA1992BR (IC701) and CXD2589Q (IC703)    “L”: reset
10
C-CLOCK
O
Serial data transfer clock signal output to the CXD2589Q (IC703)
11
C-LATCH
O
Serial data latch pulse signal output to the CXD2589Q (IC703)
12
C-DATA
O
Serial data output to the CXD2589Q (IC703)
13
REC
I
Record/playback detection signal input terminal    “L”: recording mode, “H”: playback mode
14
R-COUNT
I
PLL serial data input from the FM/AM PLL (IC2)
15
R-DATA
O
PLL serial data output to the FM/AM PLL (IC2)
16
R-CLOCK
O
PLL serial data transfer clock signal output to the FM/AM PLL (IC2)
17
R-LATCH
O
PLL serial data latch pulse signal output to the FM/AM PLL (IC2)
18
V-LATCH
O
Serial data latch pulse signal output to the electrical volume (IC302)
19
V-DATA
O
Serial data output to the electrical volume (IC302)
20
V-CLOCK
O
Serial data transfer clock signal output to the electrical volume (IC302)
21
P-CON
O
Power on/off control signal output to the power supply circuit, and power amplifier (IC303)
“L”: standby mode, “H”: power on
22
DC1
I
DC level check input of the dry battery and AC input (+9V check) (A/D input)
23
DC2
I
DC level check input of the dry battery (+6V check) (A/D input)
24
DC3
I
DC level check input of the dry battery (+3V check) (A/D input)
25
KEY1
I
Key input terminal (A/D input)    S601 to S606 (ALARM, TIMER, SLEEP, DISPLAY, MEM 
ENT, PLAY MODE  MONO/ST  ISS, SOUND keys input)
26
KEY2
I
Key input terminal (A/D input)    S609 to S615 (x, u, CLOCK, MEGA BASS, START/
STOP, . # CLOCK, > 3 CLOCK keys input)
27
KEY3
I
Key input terminal (A/D input)    S617, S619 to S624 (POWER, BAND, VOL +, VOL –, 
PRESET –, PRESET +, AUTO PRESET keys input)
28
MODE CHECK
I
Destination setting terminal
29
SHIFT CLOCK
O
Shift clock output of the main system clock (4.19 MHz)    “H” active
Initial setting signal output terminal
30
RST
I
System reset signal input from the reset signal generator (IC503)    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
31
EXTAL
I
Main system clock input terminal (4.19 MHz)
32
XTAL
O
Main system clock output terminal (4.19 MHz)
33
VSS
Ground terminal
34
VL
O
Liquid crystal display drive bias control signal output terminal
35 to 37
VLC3 to VLC1
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
38 to 41
COM0 to COM3
O
Common drive signal output to the liquid crystal display (LCD501)
42 to 64
SEG0 to SEG22
O
Segment drive signal output to the liquid crystal display (LCD501)
65
MOTOR ON
O
Capstan/reel motor (M301) on/off control signal output terminal
66
A-MUTE
O
Audio muting on/off control signal output to the electrical volume (IC302)    “H”: muting on
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