Read Sony BDV-Z7 / SA-WSZ7 / SS-TSZ7 Service Manual online
SA-WSZ7/SS-TSZ7
SA-WSZ7/SS-TSZ7
11
11
• Waveforms
– CONTROL Board –
– AMP-POWER Board –
ts
IC704 3 (2A)
1 V/DIV, 20 ns/DIV
82 ns
2.5 Vp-p
ta
IC700 qd (Xout)
1 V/DIV, 50 ns/DIV
100 ns
2.7 Vp-p
20.8
Ps
3.7 Vp-p
tg
IC707 wk (OLRCK)
1 V/DIV, 10
Ps/DIV
20.8
Ps
3.7 Vp-p
tj
IC708 wk (OLRCK)
1 V/DIV, 10
Ps/DIV
th
IC708 wj (OSCLK)
ya
IC1340 3 (2A)
200 mV/DIV, 10 ns/DIV
20.4 ns
0.6 Vp-p
81.5 ns
4 Vp-p
td
IC707 wf (RMCK)
1 V/DIV, 50 ns/DIV
tf
IC707 wj (OSCLK)
1 V/DIV, 200 ns/DIV
326 ns
3.5 Vp-p
1 V/DIV, 200 ns/DIV
326 ns
3.5 Vp-p
For Schematic Diagrams.
Note:
• All capacitors are in μF unless otherwise noted. (p: pF) 50
• All capacitors are in μF unless otherwise noted. (p: pF) 50
WV or less are not indicated except for electrolytics and
tantalums.
tantalums.
• All resistors are in Ω and 1/4 W or less unless otherwise
specifi ed.
• f : Internal component.
•
2 : Nonfl ammable resistor.
•
5 : Fusible resistor.
•
C : Panel designation.
THIS NOTE IS COMMON FOR PRINTED WIRING BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed in each block.)
(In addition to this, the necessary note is printed in each block.)
•
A : B+ Line.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : POWER ON
• Voltages are taken with VOM (Input impedance 10 M
• Voltages are taken with VOM (Input impedance 10 M
Ω).
Voltage variations may be noted due to normal production
tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal production
Voltage variations may be noted due to normal production
tolerances.
• Circled numbers refer to waveforms.
• Signal path.
F :
AUDIO
• The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
from that of conventional IC.
from that of conventional IC.
For Printed Wiring Boards.
Note:
•
•
X : Parts extracted from the component side.
•
Y : Parts extracted from the conductor side.
• f : Internal component.
•
: Pattern from the side which enables seeing.
(The other layers’ patterns are not indicated.)
• Indication of transistor.
C
B
These are omitted.
E
Q
B
These are omitted.
C E
Q
• Lead layouts
surface
CSP (Chip Size Package)
Lead layout of conventional IC
Caution:
Pattern face side:
(Conductor Side)
Parts face side:
(Component Side)
Pattern face side:
(Conductor Side)
Parts face side:
(Component Side)
Parts on the pattern face side seen
from the pattern face are indicated.
Parts on the parts face side seen from
the parts face are indicated.
from the pattern face are indicated.
Parts on the parts face side seen from
the parts face are indicated.
Note: The components identifi ed by mark
0 or dotted
line with mark
0 are critical for safety.
Replace only with part number specifi ed.
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