Read Sony BDV-IS1000 / BDV-IT1000 / BDV-IT1000ES / HCD-IS1000 / HCD-IT1000 Service Manual online
HCD-IS1000/IT1000/IT1000ES
124
Pin No.
Pin Name
I/O
Description
98
OVDD
-
Power supply terminal (+3.3V) (for I/O)
99
OVSS
-
Ground terminal (for I/O)
100
RAS
O
Row address strobe signal output to the SD-RAM
101
DQM
O
Data mask signal output to the SD-RAM
102
CAS
O
Column address strobe signal output to the SD-RAM
103
MCLK
O
Clock signal output to the SD-RAM
104
WE
O
Write enable signal output to the SD-RAM
105, 106
TEST3, TEST4
I
Test terminal Fixed at "L" in this set
107
OVSS
-
Ground terminal (for I/O)
108
OVDD
-
Power supply terminal (+3.3V) (for I/O)
109
CVDD
-
Power supply terminal (+2.5V) (for core)
110 to 113
MD7, MD8, MD6, MD9
I/O
Two-way data bus with the SD-RAM
114
OVDD
-
Power supply terminal (+3.3V) (for I/O)
115
OVSS
-
Ground terminal (for I/O)
116 to 119
MD5, MD10, MD4,
MD11
I/O
Two-way data bus with the SD-RAM
120
OVDD
-
Power supply terminal (+3.3V) (for I/O)
121
OVSS
-
Ground terminal (for I/O)
122 to 125
MD3, MD12, MD2,
MD13
I/O
Two-way data bus with the SD-RAM
126
OVSS
-
Ground terminal (for I/O)
127
CVSS
-
Ground terminal (for core)
128
OVDD
-
Power supply terminal (+3.3V) (for I/O)
129 to 132
MD1, MD14, MD0,
MD15
I/O
Two-way data bus with the SD-RAM
133
SLV
I
Slave address setting terminal "L": 0 x 72, "H": 0 x 70 Fixed at "H" in this set
134
RFFO
O
MPEG fl ag (repeat fi rst fi eld fl ag) output terminal Not used
135
SDA
I/O
Two-way I2C data bus with the EEPROM, HDMI receiver, HDMI transmitter, HDMI controller
and video decoder
and video decoder
136
SCL
I
I2C clock signal input from the HDMI controller
137
SRN
I
Reset signal input from the HDMI controller "L": reset
138
OVSS
-
Ground terminal (for I/O)
139
CVDD
-
Power supply terminal (+2.5V) (for core)
140
PLL_VDD
-
Power supply terminal (+2.5V) (for PLL)
141
VPDX
-
Not used
142
TEST
I
Test terminal Fixed at "L" in this set
143
PLL_GND
-
Ground terminal (for I/O)
144
IVDD
-
Power supply terminal (+3.3V) (for I/O)
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