Read Sony BDV-F7 / HBD-F7 Service Manual online
HBD-F7
94
AMP BOARD IC101 R5F364AMDFA (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DAMP_SCDT
O
Serial data output to the stream processor
2
DAMP_SHIFT
O
Serial data transfer clock signal output to the stream processor
3
FL_CS
O
Chip select signal output to the fl uorescent indicator tube driver
4
SIRCS_IN
I
SIRCS signal input from the remote control receiver
5
FL_DATA
O
Serial data output to the fl uorescent indicator tube driver
6
NC
-
Not used
7
FL_CLK
O
Serial data transfer clock signal output to the fl uorescent indicator tube driver
8
BYTE
I
External data bus width selection signal input terminal
9
CNVss
I
Processor mode selection signal input terminal
10
FL_RST
O
Reset signal output to the fl uorescent indicator tube driver
11
P_DET
-
Not used
12
RESET
I
System reset signal input from the reset switch
13
Xout
O
Main system clock output terminal (6 MHz)
14
Vss
-
Ground terminal
15
Xin
I
Main system clock input terminal (6 MHz)
16
Vcc1
-
Power supply terminal (+3.3V)
17
CEC_TX_RX
I/O
CEC serial data input/output with the HDMI OUT connector
18
NC
-
Not used
19
KEY_INT
I
Key wake-up signal input terminal
20
AC_CUT
I
AC cut detection signal input terminal
21
AMUTE
-
Not used
22
LED_PWM
O
LED drive signal output terminal
23
FAN_DET2
I
FAN motor status detection signal input terminal
24
NC
-
Not used
25
SYSCON_RST
O
Reset signal output to the BD decoder, NAND fl ash, EEPROM and ethernet interface
26
NC
-
Not used
27
START_BIT
O
Busy request signal output to the BD decoder
28
SYSCON_REQ
I
Request signal input from the BD decoder
29 to 34
NC
-
Not used
35
PCONT_CORE
O
Power on/off control signal output terminal for the BD section
36
BD_PCONT2
O
Power on/off control signal output terminal for the BD section
37
XIF_CS
O
Chip select signal output to the BD decoder
38
BD_PCONT3
O
Power on/off control signal output terminal for the BD section
39
HAMON_MODE
O
Mode setting signal output terminal Not used
40
UPG_STATUS
I
UPG status signal input from the BD decoder
41
JIG_MODE1
I/O
Special model use
42
FE_EJECT
O
Eject/stop key output to the BD decoder
43
CPU_PRERST
O
Reset signal output to the serial fl ash
44
CORE_RST
O
Reset signal output terminal Not used
45
ATA_PCONT
O
Power on/off control signal output terminal for the BD section
46
CE
-
Not used
47
IF_SDO
O
Serial data output to the BD decoder
48
IF_SDI
I
Serial data input from the BD decoder
49
IF_SCK
I
Serial data transfer clock signal input from the BD decoder
50
OPWRSB
I
Power on/off control signal input from the BD decoder
51
BD_PCONT4
O
Power on/off control signal output terminal Not used
52
HCD_PCONT1
O
Power on/off control signal output terminal
53
EN
O
Reset signal output to the power amplifi er
54
FL_PCONT
O
Power on/off control signal output terminal for the front panel section
55
ST_TUNED
I
Tuned detection signal input from the tuner (FM)
56
ST_CE
O
Chip enable signal output to the tuner (FM)
57
ST_DI
O
Serial data output to the tuner (FM)
58
ST_CLK
O
Serial data transfer clock signal output to the tuner (FM)
59
ST_DO
I
Serial data input from the tuner (FM)
60, 61
DAMP_OVF2,
DAMP_OVF1
I
Overfl ow detection signal input from the stream processor
62
Vcc2
-
Power supply terminal (+3.3V)
63
DAMP_LAT3
O
Serial data latch pulse signal output to the stream processor
64
Vss
-
Ground terminal
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