LC-52X20E (serv.man5). Major IC Informations - Sharp TV Service Manual (repair manual). Page 18

LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU

5 – 18

Ball Assignments for Frame Buffer Memory.
D3, C3, C2, C1, A1, A2, 
A3, C5, A4, B5, A5, D6, 
A7, B7, C7, D7, D8, C8, 
B8, A8, D9, D10, C10, 
B10, A10, A11, B11, C11, 
D12, A13, B13, C13

MD[31:0]

I/O

Memory data.

F1, F2, F3, F4, G4, G3, 
G2, G1, H1, H2, H3, H4

MA[11-0]

I/O

Memory Address.

J2

RAS#

O

RAS# signal powered by VDDH/VSS.

J1

CAS#

O

CAS# signal powered by VDDH/VSS.

K1

WE#

O

WE#, write enable signal powered by VDDH/VSS.

J3

CS1#

O

Chip select 0 for the first 2/4 Mbyte of SGRAM/SDRAM powered by VDDH/VSS.

J4

CS0#

O

Chip select 1 for the first 2/4 Mbyte of SGRAM/SDRAM powered by VDDH/VSS.

D1

MCK0

O

Memory clock+.

E1

MCK0#

O

Memory clock-.

B1, A6, A9, A12

DQM[3:0]

O

Read/Write bytes enable powered by VDDH/VSS.

K2

CLKE

O

Memory clock enable.

B2, B6, B9, B12

DQS[3:0]

I/O

Memory data strobe.

E3

MVREF

—

DDR voltage reference.

K3

BA0

O

Bank address select.

K4

BA1

O

Bank address select.

Ball Assignments for Power and Ground.
C14, C15, D13, D14, 
D15, E13, E14, E15, 
G16, H5, H16, J5, J16, 
K5, K16, R16, T14, T15

VDDC

—

1.2V Digital core power.

E4, E7

VSSR

—

Digital memory reference Ground.

E2, E8

VDDR

—

2.5V Digital power for Memory.

B4, C4, D4, D5, D11, E5, 
E6, E9, E10, E11, E12, 
F5, G5

VDDM

—

2.5V Memory interface power. Output driver.

L16, M16, N16, P16, T12, 
T13, R17, R18

VDDH

—

3.3V Digital I/O power.

B3, C6, C9, C12, D2, H8, 
H9, H10, H11, H12, H13, 
J8, J9, J10, J11, J12, J13, 
K8, K9, K10, K11,K12, 
K13, L5, L8, L9, L10, L11, 
L12, L13, M8, M9, M10, 
M11, M12, M13, N8, N9, 
N10, N11, N12, N13, 
P18, T16, H20

VSS

—

Core and Digital IO ground.

W3

AVSS_BG_ASS

—

ADC ground.

V3

AVDD3_BG_ASS

—

3.3V ADC power.

T3

PAVDD1

—

3.3V power for MCLK PLL.

T2

PAVSS1

—

Ground for MCLK PLL.

R3

PAVSS2

—

Ground for PCLK PLL.

T4

PAVDD2

—

3.3V power for PCLK PLL.

U6, T8, U7, U5

AVDD_ADC[4, 3, 2, 1]

—

1.2V power for analog ADC.

T6, T9, T7, T5

AVSS_ADC[4, 3, 2, 1]

—

Ground for analog ADC.

U9, Y3

AVDD3_ADC[2, 1]

—

3.3V ADC power.

U3

AVDD3_OUTBUF

—

3.3V power for output buffer.

Y2

AVSS_OUTBUF

—

3.3V ground for output buffer.

C18, C19

LVDS_VSSO

—

LVDS out buffer ground.

C16

LVDS_VSSD

—

LVDS Digital ground.

E16

LVDS_VSSA

—

LVDS analog ground.

E18

LVDS_VSSP

—

LVDS PLL GND.

D18

LVDS_VDDP

—

LVDS PLL VDD.

E17

LVDS_VDDA

—

LVDS analog VDD.

D16

LVDS_VDDD

—

LVDS Digital VDD.

C17, D17

LVDS_VDDO

—

LVDS out buffer VDD.

P20

NC

—

Not connected.

U1

AVDDAPLL

—

1.2V analog PLL power.

V1

AVSSAPLL

—

1.2V analog GND.

R2

AVDDLLPLL

—

1.2V Line Lock PLL power.