Read Sharp LC-42RD2E (serv.man5) Service Manual online
LC-42RD2E/S/RU
5 – 13
8
VSYNC
I
Vsync Input.
7
HSYNC
I
Hsync Input.
10
CLKIN
I
Clock Input.
13, 22
TEST1, TEST5
O
Test Pins.
20, 21
TEST3, TEST4
I
Test Pins, must be L for normal operation.
14
TEST2
I
Test Pins, must be H for normal operation.
19
/PDWN
I
H: Normal operation. L: Power down (all outputs are Hi-Z)
18
6/8
I
6bit/8bit color select. H: 6bit (TDx +/- are GND), L: 8bit
17
OE
I
Output enable. H: Output enable, L: Output disable (all outputs are Hi-Z)
15, 16
MODE1, MODE0
I
Pixel data Mode
MODE1 MODE0 MODE
MODE1 MODE0 MODE
L
L
Dual Link (Dual-in/Dual-out)
L
H
Single Link (Dual-in/Single-out)
H
H
Single Link (Single-in/Single-out)
12
RS
I
LVDS swing range select. H: Normal range, L: Reduced range.
11
R/F
I
Input Clock Triggering Edge Select. H: Rising edge, L: Falling edge
3, 55, 71, 87
VCC
—
Power Supply Pins for TTL inputs, output and digital circuitry.
4, 56, 72, 88
GND
—
Ground pins for TTL inputs, output and digital circuitry.
33, 45
LVDS VCC
—
Power Supply Pins for LVDS Outputs.
26, 38, 50
LVDS GND
—
Ground pins for LVDS Outputs.
24
PLL VCC
—
Power Supply for PLL circuitry.
23, 25
PLL GND
—
Ground pins for PLL circuitry.
Pin No.
Pin Name
I/O
Pin Function
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